ZHCSOB0A july   2021  – august 2023 LM5157

PRODUCTION DATA  

  1.   1
  2. 1 特性
  3. 2 应用
  4. 3 说明
  5. 4 Revision History
  6. 5 Device Comparison Table
  7. 6 Pin Configuration and Functions
  8. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  Line Undervoltage Lockout (UVLO/SYNC/EN Pin)
      2. 8.3.2  High Voltage VCC Regulator (BIAS, VCC Pin)
      3. 8.3.3  Soft Start (SS Pin)
      4. 8.3.4  Switching Frequency (RT Pin)
      5. 8.3.5  Dual Random Spread Spectrum – DRSS (MODE Pin)
      6. 8.3.6  Clock Synchronization (UVLO/SYNC/EN Pin)
      7. 8.3.7  Current Sense and Slope Compensation
      8. 8.3.8  Current Limit and Minimum On Time
      9. 8.3.9  Feedback and Error Amplifier (FB, COMP Pin)
      10. 8.3.10 Power-Good Indicator (PGOOD Pin)
      11. 8.3.11 Hiccup Mode Overload Protection (MODE Pin)
      12. 8.3.12 Maximum Duty Cycle Limit and Minimum Input Supply Voltage
      13. 8.3.13 Internal MOSFET (SW Pin)
      14. 8.3.14 Overvoltage Protection (OVP)
      15. 8.3.15 Thermal Shutdown (TSD)
    4. 8.4 Device Functional Modes
      1. 8.4.1 Shutdown Mode
      2. 8.4.2 Standby Mode
      3. 8.4.3 Run Mode
        1. 8.4.3.1 Spread Spectrum Enabled
        2. 8.4.3.2 Hiccup Mode Protection Enabled
  10. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Custom Design With WEBENCH® Tools
        2. 9.2.2.2 Recommended Components
        3. 9.2.2.3 Inductor Selection (LM)
        4. 9.2.2.4 Output Capacitor (COUT)
        5. 9.2.2.5 Input Capacitor
        6. 9.2.2.6 Diode Selection
      3. 9.2.3 Application Curve
    3. 9.3 System Examples
  11. 10Power Supply Recommendations
  12. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Examples
  13. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 第三方产品免责声明
      2. 12.1.2 Development Support
        1. 12.1.2.1 Custom Design With WEBENCH® Tools
      3. 12.1.3 Export Control Notice
    2. 12.2 Documentation Support
      1. 12.2.1 Related Documentation
    3. 12.3 接收文档更新通知
    4. 12.4 支持资源
    5. 12.5 Trademarks
    6. 12.6 静电放电警告
    7. 12.7 术语表
  14. 13Mechanical, Packaging, and Orderable Information

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8.3.10 Power-Good Indicator (PGOOD Pin)

The device has a power-good indicator (PGOOD) to simplify sequencing and supervision. The PGOOD switches to a high impedance open-drain state when the FB pin voltage is greater than the feedback undervoltage threshold (VUVTH), the VCC is greater than the VCC UVLO threshold and the UVLO/EN is greater than the EN threshold. A 25-μs deglitch filter prevents any false pulldown of the PGOOD due to transients. The recommended minimum pullup resistor value is 10 kΩ.

Due to the internal diode path from the PGOOD pin to the BIAS pin, the PGOOD pin voltage cannot be greater than VBIAS + 0.3 V.