ZHCSE17B July   2015  – November 2017 LM43601-Q1

PRODUCTION DATA.  

  1. 1 特性
  2. 2 应用
  3. 3 说明
    1.     Device Images
      1.      简化原理图
      2.      辐射发射图 VIN = 12V，VOUT = 3.3V，FS= 500kHz，IOUT = 1A
  4. 4 修订历史记录
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Switching Characteristics
    8. 6.8 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Fixed Frequency Peak Current Mode Controlled Step-Down Regulator
      2. 7.3.2  Light Load Operation
      3. 7.3.3  Adjustable Output Voltage
      4. 7.3.4  ENABLE Pin
      5. 7.3.5  VCC, UVLO and BIAS
      6. 7.3.6  Soft Start and Voltage Tracking (SS/TRK)
      7. 7.3.7  Switching Frequency (RT) and Synchronization (SYNC)
      8. 7.3.8  Minimum ON-Time, Minimum OFF-Time and Frequency Foldback at Drop-Out Conditions
      9. 7.3.9  Internal Compensation and CFF
      10. 7.3.10 Bootstrap Voltage (BOOT)
      11. 7.3.11 Power Good (PGOOD)
      12. 7.3.12 Overcurrent and Short-Circuit Protection
      13. 7.3.13 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Shutdown Mode
      2. 7.4.2 Standby Mode
      3. 7.4.3 Active Mode
      4. 7.4.4 CCM Mode
      5. 7.4.5 Light Load Operation
      6. 7.4.6 Self-Bias Mode
  8. 8 Applications and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1  Custom Design With WEBENCH® Tools
        2. 8.2.2.2  Output Voltage Set-Point
        3. 8.2.2.3  Switching Frequency
        4. 8.2.2.4  Input Capacitors
        5. 8.2.2.5  Inductor Selection
        6. 8.2.2.6  Output Capacitor Selection
        7. 8.2.2.7  Feed-Forward Capacitor
        8. 8.2.2.8  Bootstrap Capacitors
        9. 8.2.2.9  VCC Capacitor
        10. 8.2.2.10 BIAS Capacitors
        11. 8.2.2.11 Soft-Start Capacitors
        12. 8.2.2.12 Undervoltage Lockout Setpoint
        13. 8.2.2.13 PGOOD
      3. 8.2.3 Application Performance Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
      1. 10.1.1 Compact Layout for EMI Reduction
      2. 10.1.2 Ground Plane and Thermal Considerations
      3. 10.1.3 Feedback Resistors
    2. 10.2 Layout Example
  11. 11器件和文档支持
    1. 11.1 器件支持
      1. 11.1.1 使用 WEBENCH® 工具创建定制设计
    2. 11.2 接收文档更新通知
    3. 11.3 社区资源
    4. 11.4 商标
    5. 11.5 静电放电警告
    6. 11.6 Glossary
  12. 12机械、封装和可订购信息

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

8.2 Typical Applications

The LM43601-Q1 only requires a few external components to convert from a wide range of supply voltage to output voltage. Figure 44 shows a basic schematic when BIAS is connected to VOUT. This is recommended for VOUT ≥ 3.3 V. For VOUT< 3.3 V, connect BIAS to ground, as shown in Figure 45.

LM43601-Q1 Sch_basic01_snvsaa0.gifFigure 44. LM43601-Q1 Basic Schematic for
VOUT ≥ 3.3 V, Tie BIAS to VOUT
LM43601-Q1 Sch_basic02_snvsaa0.gifFigure 45. LM43601-Q1 Basic Schematic for
VOUT< 3.3 V, Tie BIAS to Ground

The LM43601-Q1 also integrates a full list of optional features to aid system design requirements, such as precision enable, VCC UVLO, programmable soft start, output voltage tracking, programmable switching frequency, clock synchronization and power-good indication. Each application can select the features for a more comprehensive design. A schematic with all features utilized is shown in Figure 46.

LM43601-Q1 Sch_full_feature_snvsaa0.gifFigure 46. LM43601-Q1 Schematic with All Features

The external components must be chosen for the application, but also the stability criteria of the device control loop. The LM43601-Q1 is optimized to work within a range of external components. The inductance and capacitance of the LC output filter must considered in conjunction, creating a double pole, responsible for the corner frequency of the converter. Table 2 can be used to simplify the output filter component selection.

Table 2. L, COUT, and CFF Typical Values

FS (kHz) L (µH) COUT (µF) (1) CFF (pF) (2)(3) RT (kΩ) RFBB (kΩ) (2)(3)
VOUT = 1 V
200 18 500 none 200 100
500 6.8 330 none 80.6 or open 100
1000 3.3 180 none 39.2 100
2200 1.5 100 none 17.8 100
VOUT = 3.3 V
200 47 220 44 200 442
500 18 100 33 80.6 or open 442
1000 10 47 18 39.2 442
2200 4.7 27 12 17.8 442
VOUT = 5 V
200 56 150 68 200 255
500 27 66 33 80.6 or open 255
1000 15 33 22 39.2 255
2200 6.8 22 18 17.8 255
VOUT = 12 V
200 100 33 see note (4) 200 90.9
500 47 22 47 80.6 or open 90.9
1000 22 15 33 39.2 90.9
(1) All the COUT values are after derating. Add more when using ceramics
(2) RFBT = 0 Ω for VOUT = 1 V. RFBT = 1 MΩ for all other VOUT settings.
(3) For designs with RFBT other than 1 MΩ, adjust CFF such that (CFF × RFBT) is unchanged and adjust RFBB such that (RFBT / RFBB) is unchanged.
(4) High ESR COUT gives enough phase boost, and CFF not needed.