10.1.1 Compact Layout

Parasitic inductance can be reduced by keeping the power path components close together and keeping the area of the loops that high currents travel small. Short, thick traces or copper pours (shapes) are best. In particular, the switch node (where L1, D1, and the SW pin connect) must be just large enough to connect all three components without excessive heating from the current it carries. The LM3404 and LM3404HV devices operate in two distinct cycles whose high current paths are shown in Figure 33:

Figure 33. Buck Converter Current Loops

The dark grey, inner loop represents the high current path during the MOSFET on-time. The light grey, outer loop represents the high current path during the off-time.

10.1.2 Ground Plane and Shape Routing

The diagram of Figure 33 is also useful for analyzing the flow of continuous current versus the flow of pulsating currents. The circuit paths with current flow during both the on-time and off-time are considered to be continuous current, while those that carry current during the on-time or off-time only are pulsating currents. Preference in routing must be given to the pulsating current paths, as these are the portions of the circuit most likely to emit EMI. The ground plane of a PCB is a conductor and return path, and it is susceptible to noise injection just as any other circuit path. The continuous current paths on the ground net can be routed on the system ground plane with less risk of injecting noise into other circuits. The path between the input source and the input capacitor and the path between the recirculating diode and the LEDs and current sense resistor are examples of continuous current paths. In contrast, the path between the recirculating diode and the input capacitor carries a large pulsating current. This path must be routed with a short, thick shape, preferably on the component side of the PCB. Multiple vias in parallel must be used right at the pad of the input capacitor to connect the component side shapes to the ground plane. A second pulsating current loop that is often ignored is the gate drive loop formed by the SW and BOOT pins and capacitor C_B. To minimize this loop at the EMI it generates, keep C_B close to the SW and BOOT pins.

10.1.3 Current Sensing

The CS pin is a high-impedance input, and the loop created by R_SNS, R_Z (if used), the CS pin and ground must be made as small as possible to maximize noise rejection. Therefore, R_SNS must be placed as close as possible to the CS and GND pins of the IC.

10.1.4 Remote LED Arrays

In some applications, the LED or LED array can be far away (several inches or more) from the LM3404 and LM3404HV devices, or on a separate PCB connected by a wiring harness. When an output capacitor is used and the LED array is large or separated from the rest of the converter, the output capacitor must be placed close to the LEDs to reduce the effects of parasitic inductance on the AC impedance of the capacitor. The current sense resistor must remain on the same PCB, close to the LM3404 and LM3404HV devices.