SNVS070D March   2000  – September 2016 LM2765

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. Parameter Measurement Information
    1. 7.1 Test Circuit
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Circuit Description
    4. 8.4 Device Functional Modes
      1. 8.4.1 Shutdown Mode
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Applications
      1. 9.2.1 Voltage Doubler
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Requirements
          1. 9.2.1.2.1 Positive Voltage Doubler
          2. 9.2.1.2.2 Capacitor Selection
          3. 9.2.1.2.3 Paralleling Devices
          4. 9.2.1.2.4 Cascading Devices
          5. 9.2.1.2.5 Regulating VOUT
        3. 9.2.1.3 Application Curve
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Third-Party Products Disclaimer
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 Community Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

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11 Layout

11.1 Layout Guidelines

The high switching frequency and large switching currents of the LM2765 make the choice of layout important. Use the following steps as a reference to ensure the device is stable and maintains proper LED current regulation across its intended operating voltage and current range.

  • Place CIN on the top layer (same layer as the LM2765) and as close as possible to the device. Connecting the input capacitor through short, wide traces to both the V+ and GND pins reduces the inductive voltage spikes that occur during switching which can corrupt the V+ line.
  • Place COUT on the top layer (same layer as the LM2765) and as close as possible to the OUT and GND pin. The returns for both CIN and COUT must come together at one point, as close as possible to the GND pin. Connecting COUT through short, wide traces reduce the series inductance on the OUT and GND pins that can corrupt the VOUT and GND lines and cause excessive noise in the device and surrounding circuitry.
  • Place C1 on the top layer (same layer as the LM2765 device) and as close as possible to the device. Connect the flying capacitor through short, wide traces to both the CAP+ and CAP– pins.

11.2 Layout Example

LM2765 layout.gif Figure 15. Typical Layout for LM2765