ZHCS573I August   2010  – April 2018 LM25119

PRODUCTION DATA.  

  1. 特性
  2. 应用
  3. 说明
    1.     Device Images
      1.      典型应用电路
  4. 修订历史记录
  5. Pin Configuration and Functions
    1.     Pin Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  High Voltage Start-Up Regulator
      2. 7.3.2  UVLO
      3. 7.3.3  Enable 2
      4. 7.3.4  Oscillator and Sync Capability
      5. 7.3.5  Error Amplifiers and PWM Comparators
      6. 7.3.6  Ramp Generator
      7. 7.3.7  Current Limit
      8. 7.3.8  Hiccup Mode Current Limiting
      9. 7.3.9  Soft Start
      10. 7.3.10 HO and LO Output Drivers
      11. 7.3.11 Maximum Duty Cycle
      12. 7.3.12 Thermal Protection
    4. 7.4 Device Functional Modes
      1. 7.4.1 Diode Emulation
  8. Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Miscellaneous Functions
      2. 8.1.2 Interleaved Two-Phase Operation
      3. 8.1.3 Interleaved 4-Phase Operation
    2. 8.2 Typical Applications
      1. 8.2.1 Dual-output Design Example
        1. 8.2.1.1 Design Requirements
          1. 8.2.1.1.1 External Components
        2. 8.2.1.2 Detailed Design Procedure
          1. 8.2.1.2.1  Timing Resistor
          2. 8.2.1.2.2  Output Inductor
          3. 8.2.1.2.3  Current Sense Resistor
          4. 8.2.1.2.4  Ramp Resistor and Ramp Capacitor
          5. 8.2.1.2.5  Output Capacitors
          6. 8.2.1.2.6  Input Capacitors
          7. 8.2.1.2.7  VCC Capacitor
          8. 8.2.1.2.8  Bootstrap Capacitor
          9. 8.2.1.2.9  Soft Start Capacitor
          10. 8.2.1.2.10 Restart Capacitor
          11. 8.2.1.2.11 Output Voltage Divider
          12. 8.2.1.2.12 UVLO Divider
          13. 8.2.1.2.13 MOSFET Selection
          14. 8.2.1.2.14 MOSFET Snubber
          15. 8.2.1.2.15 Error Amplifier Compensation
        3. 8.2.1.3 Application Curves
      2. 8.2.2 Two-Phase Design Example
        1. 8.2.2.1 Design Requirements
        2. 8.2.2.2 Detailed Design Procedure
        3. 8.2.2.3 Application Curves
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
      1. 10.1.1 Switching Jitter Root Causes and Solutions
    2. 10.2 Layout Example
  11. 11器件和文档支持
    1. 11.1 社区资源
    2. 11.2 商标
    3. 11.3 静电放电警告
    4. 11.4 Glossary
  12. 12机械、封装和可订购信息

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

High Voltage Start-Up Regulator

The LM25119 contains two internal high voltage bias regulators, VCC1 and VCC2, that provide the bias supply for the PWM controllers and gate drive for the MOSFETs of each regulator channel. The input pin (VIN) can be connected directly to an input voltage source as high as 42 V. The outputs of the VCC regulators are set to
7.6 V. When the input voltage is below the VCC set-point level, the VCC output tracks the VIN with a small dropout voltage. If VCC1 is in an undervoltage condition, channel2 is disabled. This interdependence is necessary to prevent channel2 from running open-loop in the single output interleaved mode when the channel2 error amplifier is disabled (if either VCC is in UV, both channels are disabled).

The outputs of the VCC regulators are current limited at 25-mA (minimum) output capability. Upon power up, the regulators source current into the capacitors connected to the VCC pins. When the voltage at the VCC pins exceed 4 V and the UVLO pin is greater than 1.25 V, both channels are enabled and a soft-start sequence begins. Both channels remain enabled until either VCC pin falls below 3.8 V, the UVLO pin falls below 1.25 V or the die temperature exceeds the thermal limit threshold.

When operating at higher input voltages the bias power dissipation within the controller can be excessive. An output voltage derived bias supply can be applied to a VCC pins to reduce the IC power dissipation. The VCCDIS input can be used to disable the internal VCC regulators when external biasing is supplied.
If VCCDIS > 1.25 V, the internal VCC regulators are disabled. The externally supplied bias must be coupled to the VCC pins through a diode, preferably a Schottky (low forward voltage). VCCDIS has a 500-kΩ internal pulldown resistance to ground for normal operation with no external bias. The internal pulldown resistance can be overridden by pulling VCCDIS above 1.25 V through a resistor divider connected to an external bias supply.

The VCC regulator series pass transistor includes a diode between VCC and VIN that must not be forward-biased in normal operation.

If the external bias winding can supply VCC greater than VIN, an external blocking diode is required from the input power supply to the VIN pin to prevent the external bias supply from passing current to the input supply through the VCC pins. For VOUT between 5 V and 14.5 V, VOUT can be connected directly to VCC through a diode. For VOUT < 5 V, a bias winding on the output inductor can be added as shown in Figure 8.

LM25119 30126211.gifFigure 8. VCC Bias Supply With Additional Inductor Winding

In high voltage applications, take extra care to ensure the VIN pin does not exceed the absolute maximum voltage rating of 45 V. During line or load transients, voltage ringing on the VIN line that exceeds the absolute maximum rating can damage the IC. Both careful PCB layout and the use of quality bypass capacitors located close to the VIN and AGND pins are essential.