SNVS739F Data sheet | 德州仪器 TI.com.cn

6.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)⁽¹⁾⁽²⁾

	MIN	MAX	UNIT
VIN, VCOMP	–0.3	6	V
VIN_IO, VIN_B1, VIN_B2, VIN_B3, SPI_CS, SPI_DI, SPI_CLK, SPI_DO, Vselect_B2,Vselect_B3, RESET, SW_1, SW_2, SW_3, FB_1, FB_2, FB_3, LDO, Interrupt, DevSLP	–0.3	6	V
Junction temperature, T_J-MAX		150	°C
Storage temperature, T_stg	–65	150	°C

(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

(2) If Military/Aerospace specified devices are required, please contact the TI Sales Office/Distributors for availability and specifications.

6.2 ESD Ratings

			VALUE	UNIT
V_(ESD)	Electrostatic discharge	Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001⁽¹⁾	±2000	V

(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.

6.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)⁽¹⁾⁽²⁾⁽³⁾

		MIN	MAX	UNIT
	VIN_B1, VIN_B2_VIN_B3, VIN	3	5.5	V
	VIN_IO	1.72	3.63	V
	All pins other than VIN_IO	0	V_IN	V
P_D-MAX	Maximum continuous power dissipation		0.9	W
T_A	Ambient temperature	–30	85	°C
T_J	Junction temperature	–30	125	°C

(1) Internal thermal shutdown protects device from permanent damage. Thermal shutdown engages at T_J = 140°C and disengages at
T_J = 120°C (typically). Thermal shutdown is ensured by design.

(2) In applications where high power dissipation or poor thermal resistance is present, the maximum ambient temperature may have to be derated. Maximum ambient temperature (T_A-MAX) is dependent on the maximum operating junction temperature (T_J-MAX-OP = 125°C), the maximum power dissipation of the device in the application (P_D-MAX), and the junction-to-ambient thermal resistance of the part or package in the application (R_θJA), as given by the following equation: T_A-MAX = T_J-MAX-OP – (R_θJA × P_D-MAX).

(3) The amount of absolute maximum power dissipation allowed for the device depends on the ambient temperature and can be calculated using the formula: P = (T_J – T_A) / R_θJA, where T_J is the junction temperature, T_A is the ambient temperature, and R_θJA is the junction-to-ambient thermal resistance. R_θJA is highly application and board-layout dependent. Internal thermal shutdown circuitry protects the device from permanent damage (see Electrical Characteristics – General).

6.4 Thermal Information

THERMAL METRIC⁽¹⁾		LM10504	UNIT
		YFR (DSBGA)
		34 PINS
R_θJA	Junction-to-ambient thermal resistance	65.6	°C/W
R_θJC(top)	Junction-to-case (top) thermal resistance	0.2	°C/W
R_θJB	Junction-to-board thermal resistance	39	°C/W
ψ_JT	Junction-to-top characterization parameter	1.5	°C/W
ψ_JB	Junction-to-board characterization parameter	38.6	°C/W
R_θJC(bot)	Junction-to-case (bottom) thermal resistance	—	°C/W

(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report.

6.5 Electrical Characteristics – General

T_J = 25°C and V_IN = 5 V where V_IN = V_{IN_B1} = V_{IN_B2} = V_{IN_B3} (unless otherwise noted)⁽¹⁾⁽²⁾

PARAMETER		TEST CONDITIONS		MIN	TYP	MAX	UNIT
I_Q(DEVSLP)	Quiescent supply current	DevSLP = HIGH, no load	T_J = 25°C		100		µA
I_Q(DEVSLP)	Quiescent supply current	DevSLP = HIGH, no load	–30°C ≤ T_J ≤ 85°C			200	µA
UNDERVOLTAGE OR OVERVOLTAGE LOCKOUT
V_{UVLO_RISING}	Undervoltage lockout, rising	T_J = 25°C			2.9		V
V_{UVLO_RISING}	Undervoltage lockout, rising	–30°C ≤ T_J ≤ 85°C		2.75		3.05	V
V_{UVLO_FALLING}	Undervoltage lockout, falling	T_J = 25°C			2.6		V
V_{UVLO_FALLING}	Undervoltage lockout, falling	–30°C ≤ T_J ≤ 85°C		2.45		2.75	V
V_{OVLO_RISING}	Overvoltage lockout, rising				5.64		V
V_{OVLO_FALLING}	Overvoltage lockout, falling				5.54		V
DIGITAL INTERFACE
V_IL	Logic input low	SPI_CS, SPI_DI, SPI_CLK, RESET, DevSLP, –30°C ≤ T_J ≤ 85°C		0.7 × VIN_IO		0.3 × VIN_IO	V
V_IH	Logic input high	SPI_CS, SPI_DI, SPI_CLK, RESET, DevSLP, –30°C ≤ T_J ≤ 85°C		0.7 × VIN_IO		0.3 × VIN_IO	V
V_IL	Logic input low	Vselect_B2, Vselect_B3, –30°C ≤ T_J ≤ 85°C		0.7 × VIN		0.3 × VIN	V
V_IH	Logic input high	Vselect_B2, Vselect_B3, –30°C ≤ T_J ≤ 85°C		0.7 × VIN		0.3 × VIN	V
V_OL	Logic output low	SPI_DO, –30°C ≤ T_J ≤ 85°C		0.8 × VIN_IO		0.2 × VIN_IO	V
V_OH	Logic output high	SPI_DO, –30°C ≤ T_J ≤ 85°C		0.8 × VIN_IO		0.2 × VIN_IO	V
I_IL	Input current, pin driven low	SPI_CS, SPI_DI, SPI_CLK, Vselect_B2, DevSLP		–2			µA
I_IL	Input current, pin driven low	Vselect_B3, RESET		–5			µA
I_IH	Input current, pin driven high	SPI_CS, SPI_DI, SPI_CLK, Vselect_B3, RESET				2	µA
I_IH	Input current, pin driven high	Vselect_B2, DevSLP				5	µA
f_{SPI_MAX}	SPI max frequency	–30°C ≤ T_J ≤ 85°C				10	MHz
t_RESET	Minimum pulse width⁽³⁾	–30°C ≤ T_J ≤ 85°C			2		µs
t_DEVSLP	Minimum pulse width⁽³⁾	–30°C ≤ T_J ≤ 85°C			2		µs

(1) All limits are ensured by design, test, or statistical analysis. All electrical characteristics having room-temperature limits are tested during production with T_J = 25°C. All hot and cold limits are ensured by correlating the electrical characteristics to process and temperature variations and applying statistical process control.

(2) Capacitors: Low-ESR surface-mount ceramic capacitors (MLCCs) are used in setting electrical characteristics.

(3) Specification ensured by design. Not tested during production.

6.6 Electrical Characteristics – Buck 1

T_J = 25°C and V_IN = 5 V where V_IN=V_{IN_B1} = V_{IN_B2} = V_{IN_B3} (unless otherwise noted)⁽¹⁾⁽²⁾⁽³⁾

PARAMETER		CONDITIONS		MIN	TYP	MAX	UNITS
I_Q	V_IN DC bias current	No load, PFM mode	T_J = 25°C		15		µA
I_Q	V_IN DC bias current	No load, PFM mode	–30°C ≤ T_J ≤ 85°C			50	µA
I_{OUT_MAX}	Continuous maximum load current⁽⁴⁾⁽⁵⁾	Buck 1 enabled, switching in PWM, –30°C ≤ T_J ≤ 85°C		1.6			A
I_PEAK	Peak switching current limit	Buck 1 enabled, switching in PWM	T_J = 25°C		2.1		A
I_PEAK	Peak switching current limit	Buck 1 enabled, switching in PWM	–30°C ≤ T_J ≤ 85°C	1.9		2.6	A
η	Peak efficiency⁽⁴⁾	I_OUT = 0.3 A			90%
F_SW	Switching frequency	T_J = 25°C			2		MHz
F_SW	Switching frequency	–30°C ≤ T_J ≤ 85°C		1.75		2.3	MHz
C_IN	Input capacitor⁽⁴⁾	0 mA ≤ I_OUT ≤ I_OUT-MAX			4.7		µF
C_OUT	Output filter capacitor⁽⁴⁾	0 mA ≤ I_OUT ≤ I_OUT-MAX		10	10	100	µF
C_OUT	Output capacitor ESR⁽⁴⁾	0 mA ≤ I_OUT ≤ I_OUT-MAX				20	mΩ
L	Output filter inductance⁽⁴⁾	0 mA ≤ I_OUT ≤ I_OUT-MAX			2.2		µH
ΔVOUT	DC line regulation⁽⁴⁾	3.3 V ≤ V_IN ≤ 5 V, I_OUT = I_OUT-MAX			0.5%		V
ΔVOUT	DC load regulation⁽⁴⁾	100 mA ≤ I_OUT ≤ I_OUT-MAX			0.3%		A
I_FB	Feedback pin input bias current	V_FB = 3 V	T_J = 25°C		2.1		µA
I_FB	Feedback pin input bias current	V_FB = 3 V	–30°C ≤ T_J ≤ 85°C			5	µA
R_DS-ON-HS	High-side switch on resistance				135		mΩ
R_DS-ON-HS	High-side switch on resistance	V_IN = 2.6 V			215		mΩ
R_DS-ON-LS	Low-side switch on resistance	T_J = 25°C			85		mΩ
R_DS-ON-LS	Low-side switch on resistance	–30°C ≤ T_J ≤ 85°C				190	mΩ
R_DS-ON-BYPASS	Bypass FET on resistance	Used in parallel with the high-side FET while in bypass mode. Resistance (DCR) of inductor = 100 mΩ
		V_IN = 3.3 V			85		mΩ
		V_IN = 2.6 V			120		mΩ
START-UP
T_START	Internal soft-start (turnon time)⁽⁴⁾	Start up from shutdown, V_OUT = 0 V, no load, LC = recommended circuit, using software enable, to V_OUT = 95% of final value			0.1		ms

(1) All limits are ensured by design, test, or statistical analysis. All electrical characteristics having room-temperature limits are tested during production with T_J = 25°C. All hot and cold limits are ensured by correlating the electrical characteristics to process and temperature variations and applying statistical process control.

(2) Capacitors: Low-ESR surface-mount ceramic capacitors (MLCCs) are used in setting electrical characteristics.

(3) BUCK normal operation is ensured if V_IN ≥ V_OUT + 1 V.

(4) Specification ensured by design. Not tested during production.

(5) In applications where high power dissipation or poor thermal resistance is present, the maximum ambient temperature may have to be derated. Maximum ambient temperature (T_A-MAX) is dependent on the maximum operating junction temperature (T_J-MAX-OP = 125°C), the maximum power dissipation of the device in the application (P_D-MAX), and the junction-to-ambient thermal resistance of the part or package in the application (R_θJA), as given by the following equation: T_A-MAX = T_J-MAX-OP – (R_θJA × P_D-MAX).

6.7 Electrical Characteristics – Buck 2

T_J = 25°C and V_IN = 5 V where V_IN=V_{IN_B1} = V_{IN_B2} = V_{IN_B3} (unless otherwise noted)⁽¹⁾⁽²⁾⁽³⁾

PARAMETER		TEST CONDITIONS		MIN	TYP	MAX	UNIT
I_Q	V_IN DC bias current	No load, PFM mode	T_J = 25°C		15		µA
I_Q	V_IN DC bias current	No load, PFM mode	–30°C ≤ T_J ≤ 85°C			50	µA
I_{OUT_MAX}	Continuous maximum load current⁽⁴⁾⁽⁵⁾	Buck 2 enabled, switching in PWM, –30°C ≤ T_J ≤ 85°C		1			A
I_PEAK	Peak switching current limit	Buck 2 enabled, switching in PWM	T_J = 25°C		1.56		A
I_PEAK	Peak switching current limit	Buck 2 enabled, switching in PWM	–30°C ≤ T_J ≤ 85°C	1.35		1.8	A
η	Peak efficiency⁽⁴⁾	I_OUT = 0.3 A			90%
F_SW	Switching frequency	T_J = 25°C			2		MHz
F_SW	Switching frequency	–30°C ≤ T_J ≤ 85°C		1.75		2.3	MHz
C_IN	Input capacitor⁽⁴⁾	0 mA ≤ I_OUT ≤ I_OUT-MAX			4.7		µF
C_OUT	Output filter capacitor⁽⁴⁾	0 mA ≤ I_OUT ≤ I_OUT-MAX		10	10	100	µF
C_OUT	Output capacitor ESR⁽⁴⁾	0 mA ≤ I_OUT ≤ I_OUT-MAX				20	mΩ
L	Output filter inductance⁽⁴⁾	0 mA ≤ I_OUT ≤ I_OUT-MAX			2.2		µH
ΔVOUT	DC line regulation⁽⁴⁾	3.3 V ≤ V_IN ≤ 5 V, I_OUT = I_OUT-MAX			0.5%		V
ΔVOUT	DC load regulation⁽⁴⁾	100 mA ≤ I_OUT ≤ I_OUT-MAX			0.3%		A
I_FB	Feedback pin input bias current	V_FB = 1.8 V	T_J = 25°C		1.8		µA
I_FB	Feedback pin input bias current	V_FB = 1.8 V	–30°C ≤ T_J ≤ 85°C			5	µA
R_DS-ON-HS	High-side switch on resistance				135		mΩ
R_DS-ON-HS	High-side switch on resistance	V_IN = 2.6 V			260
R_DS-ON-LS	Low-side switch on resistance	T_J = 25°C			85
R_DS-ON-LS	Low-side switch on resistance	–30°C ≤ T_J ≤ 85°C				190
START-UP
T_START	Internal soft-start (turnon time)⁽⁴⁾	Start up from shutdown, V_OUT = 0 V, no load, LC = recommended circuit, using software enable, to V_OUT = 95% of final value			0.1		ms

(1) All limits are ensured by design, test, or statistical analysis. All electrical characteristics having room-temperature limits are tested during production with T_J = 25°C. All hot and cold limits are ensured by correlating the electrical characteristics to process and temperature variations and applying statistical process control.

(2) Capacitors: Low-ESR surface-mount ceramic capacitors (MLCCs) are used in setting electrical characteristics.

(3) BUCK normal operation is ensured if V_IN ≥ V_OUT + 1 V.

(4) Specification ensured by design. Not tested during production.

(5) In applications where high power dissipation or poor thermal resistance is present, the maximum ambient temperature may have to be derated. Maximum ambient temperature (T_A-MAX) is dependent on the maximum operating junction temperature (T_J-MAX-OP = 125°C), the maximum power dissipation of the device in the application (P_D-MAX), and the junction-to-ambient thermal resistance of the part or package in the application (R_θJA), as given by the following equation: T_A-MAX = T_J-MAX-OP – (R_θJA × P_D-MAX).

6.8 Electrical Characteristics – Buck 3

T_J = 25°C and V_IN = 5 V where V_IN = V_{IN_B1} = V_{IN_B2} = V_{IN_B3} (unless otherwise noted)⁽¹⁾⁽²⁾⁽³⁾

PARAMETER		TEST CONDITIONS		MIN	TYP	MAX	UNIT
I_Q	V_IN DC bias current	No load, PFM mode	T_J = 25°C		15		µA
I_Q	V_IN DC bias current	No load, PFM mode	–30°C ≤ T_J ≤ 85°C			50	µA
I_{OUT_MAX}	Continuous maximum load current⁽⁴⁾⁽⁵⁾	Buck 3 enabled, switching in PWM, –30°C ≤ T_J ≤ 85°C		1			A
I_PEAK	Peak switching current limit	Buck 3 enabled, switching in PWM	T_J = 25°C		1.56		A
I_PEAK	Peak switching current limit	Buck 3 enabled, switching in PWM	–30°C ≤ T_J ≤ 85°C	1.35		1.8	A
η	Peak efficiency⁽⁴⁾	I_OUT = 0.3 A			90%
F_SW	Switching frequency	T_J = 25°C			2		MHz
F_SW	Switching frequency	–30°C ≤ T_J ≤ 85°C		1.75		2.3	MHz
C_IN	Input capacitor⁽⁴⁾	0 mA ≤ I_OUT ≤ I_OUT-MAX			4.7		µF
C_OUT	Output filter capacitor⁽⁴⁾	0 mA ≤ I_OUT ≤ I_OUT-MAX		10	10	100	µF
C_OUT	Output capacitor ESR⁽⁴⁾	0 mA ≤ I_OUT ≤ I_OUT-MAX				20	mΩ
L	Output filter inductance⁽⁴⁾	0 mA ≤ I_OUT ≤ I_OUT-MAX			2.2		µH
ΔVOUT	DC line regulation⁽⁴⁾	3.3 V ≤ V_IN ≤ 5 V, I_OUT = I_OUT-MAX			0.5%		V
ΔVOUT	DC load regulation⁽⁴⁾	100 mA ≤ I_OUT ≤ I_OUT-MAX			0.3%		A
I_FB	Feedback pin input bias current	V_FB = 1.2 V	T_J = 25°C		0.9		µA
I_FB	Feedback pin input bias current	V_FB = 1.2 V	–30°C ≤ T_J ≤ 85°C			5	µA
R_DS-ON-HS	High-side switch on resistance				135		mΩ
R_DS-ON-HS	High-side switch on resistance	V_IN = 2.6 V			260
R_DS-ON-LS	Low-side switch on resistance	T_J = 25°C			85
R_DS-ON-LS	Low-side switch on resistance	–30°C ≤ T_J ≤ 85°C				190
START-UP
T_START	Internal soft-start (turnon time)⁽⁴⁾	Start up from shutdown, V_OUT = 0 V, no load, LC = recommended circuit, using software enable, to V_OUT = 95% of final value			0.1		ms

(1) All limits are ensured by design, test, or statistical analysis. All electrical characteristics having room-temperature limits are tested during production with T_J = 25°C. All hot and cold limits are ensured by correlating the electrical characteristics to process and temperature variations and applying statistical process control.

(2) Capacitors: Low-ESR surface-mount ceramic capacitors (MLCCs) are used in setting electrical characteristics.

(3) BUCK normal operation is ensured if V_IN ≥ V_OUT + 1 V.

(4) Specification ensured by design. Not tested during production.

(5) In applications where high power dissipation or poor thermal resistance is present, the maximum ambient temperature may have to be derated. Maximum ambient temperature (T_A-MAX) is dependent on the maximum operating junction temperature (T_J-MAX-OP = 125°C), the maximum power dissipation of the device in the application (P_D-MAX), and the junction-to-ambient thermal resistance of the part or package in the application (R_θJA), as given by the following equation: T_A-MAX = T_J-MAX-OP – (R_θJA × P_D-MAX).

6.9 Electrical Characteristics – LDO

T_J = 25°C and V_IN = 5 V where: V_IN = V_{IN_B1} = V_{IN_B2} = V_{IN_B3} (unless otherwise noted)⁽¹⁾⁽²⁾

PARAMETER		TEST CONDITIONS		MIN	TYP	MAX	UNIT
V_OUT	Output voltage accuracy	I_OUT = 1 mA, –30°C ≤ T_J ≤ 85°C		–3%		3%
I_OUT	Maximum output current			250			mA
I_SC	Short-circuit current limit	V_OUT = 0 V			0.5		A
V_DO	Dropout voltage	I_OUT = 250 mA	T_J = 25°C		160		mV
V_DO	Dropout voltage	I_OUT = 250 mA	–30°C ≤ T_J ≤ 85°C			220
ΔV_OUT	Line regulation	3.3 V ≤ V_IN ≤ 5 V, I_OUT = 1 mA			5
ΔV_OUT	Load regulation	1 mA ≤ I_OUT ≤ 250 mA, V_IN = 3.3 V, 5 V			5
e_N	Output noise voltage⁽³⁾	10 Hz ≤ f ≤ 100 kHz	V_IN = 5 V		10		µV_RMS
e_N	Output noise voltage⁽³⁾	10 Hz ≤ f ≤ 100 kHz	V_IN = 3.3 V		35		µV_RMS
PSRR	Power supply rejection ratio⁽³⁾	F = 10 kHz, C_OUT = 4.7 µF, I_OUT = 20 mA	V_IN = 5 V		65		dB
PSRR	Power supply rejection ratio⁽³⁾	F = 10 kHz, C_OUT = 4.7 µF, I_OUT = 20 mA	V_IN = 3.3 V		40		dB
T_START	Start-up time from shutdown⁽³⁾	C_OUT = 4.7 µF, I_OUT = 250 mA	V_IN = 5 V		45		µs
T_START	Start-up time from shutdown⁽³⁾	C_OUT = 4.7 µF, I_OUT = 250 mA	V_IN = 3.3 V		60		µs
T_TRANSIENT	Start-up transient overshoot⁽³⁾	C_OUT = 4.7 µF, I_OUT = 250 mA, –30°C ≤ T_J ≤ 85°C				30	mV

(1) All limits are ensured by design, test, or statistical analysis. All electrical characteristics having room-temperature limits are tested during production with T_J = 25°C. All hot and cold limits are ensured by correlating the electrical characteristics to process and temperature variations and applying statistical process control.

(2) Capacitors: Low-ESR surface-mount ceramic capacitors (MLCCs) are used in setting electrical characteristics.

(3) Specification ensured by design. Not tested during production.

6.10 Electrical Characteristics – Comparators

T_J = 25°C and V_IN = 5 V (unless otherwise noted)⁽¹⁾⁽²⁾

PARAMETER		TEST CONDITIONS		MIN	TYP	MAX	UNIT
I_VCOMP	VCOMP pin bias current	V_COMP = 0 V	T_J = 25°C		0.1		µA
		V_COMP = 0 V	–30°C ≤ T_J ≤ 85°C			2
		V_COMP = 5 V	T_J = 25°C		0.1
		V_COMP = 5 V	–30°C ≤ T_J ≤ 85°C			2
V_{COMP_RISE}	Comparator rising edge trigger level				2.79		V
V_{COMP_FALL}	Comparator falling edge trigger level				2.74		V
	Hysteresis	T_J = 25°C			60		mV
	Hysteresis	–30°C ≤ T_J ≤ 85°C		30		80	mV
Interrupt_VOH	Output voltage high	–30°C ≤ T_J ≤ 85°C				0.8 × VIN_IO	V
Interrupt_VOL	Output voltage low	–30°C ≤ T_J ≤ 85°C		0.2 × VIN_IO			V
t_COMP	Transition time of interrupt output	T_J = 25°C			6		µs
t_COMP	Transition time of interrupt output	–30°C ≤ T_J ≤ 85°C				15	µs

(1) All limits are ensured by design, test, or statistical analysis. All electrical characteristics having room-temperature limits are tested during production with T_J = 25°C. All hot and cold limits are ensured by correlating the electrical characteristics to process and temperature variations and applying statistical process control.

(2) Capacitors: Low-ESR surface-mount ceramic capacitors (MLCCs) are used in setting electrical characteristics.