ZHCSE61A July   2015  – September 2015 ISO7830

PRODUCTION DATA.  

  1. 特性
  2. 应用范围
  3. 说明
  4. 修订历史记录
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Power Rating
    6. 6.6  Electrical Characteristics, 5 V
    7. 6.7  Electrical Characteristics, 3.3 V
    8. 6.8  Electrical Characteristics, 2.5 V
    9. 6.9  Switching Characteristics, 5 V
    10. 6.10 Switching Characteristics, 3.3 V
    11. 6.11 Switching Characteristics, 2.5 V
    12. 6.12 Typical Characteristics
  7. Parameter Measurement Information
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 High Voltage Feature Description
        1. 8.3.1.1 Package Insulation and Safety-Related Specifications
        2. 8.3.1.2 Insulation Characteristics
        3. 8.3.1.3 IEC 60664-1 Ratings Table
        4. 8.3.1.4 Regulatory Information
        5. 8.3.1.5 Safety Limiting Values
    4. 8.4 Device Functional Modes
      1. 8.4.1 Device I/O Schematics
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Electromagnetic Compatibility (EMC) Considerations
      3. 9.2.3 Application Curve
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
      1. 11.1.1 PCB Material
    2. 11.2 Layout Example
  12. 12器件和文档支持
    1. 12.1 文档支持
      1. 12.1.1 相关文档
    2. 12.2 相关链接
    3. 12.3 社区资源
    4. 12.4 商标
    5. 12.5 静电放电警告
    6. 12.6 Glossary
  13. 13机械、封装和可订购信息

封装选项

请参考 PDF 数据表获取器件具体的封装图。

机械数据 (封装 | 引脚)
  • DWW|16
  • DW|16
散热焊盘机械数据 (封装 | 引脚)
订购信息

5 Pin Configuration and Functions

DW Package
16-Pin SOIC
Top View
ISO7830 ISO7830F po_sllseo2.gif

Pin Functions

PIN I/O DESCRIPTION
NAME NO.
EN1 7 I Output enable 1. Output pins on side 1 are enabled when EN1 is high or open and in high-impedance state when EN1 is low.
EN2 10 I Output enable 2. Output pins on side 2 are enabled when EN2 is high or open and in high-impedance state when EN2 is low.
GND1 2, 8 Ground connection for VCC1
GND2 9, 15 Ground connection for VCC2
INA 3 I Input, channel A
INB 4 I Input, channel B
INC 5 I Input, channel C
OUTA 14 O Output, channel A
OUTB 13 O Output, channel B
OUTC 12 O Output, channel C
NC 6, 11 Not connected
VCC1 1 Power supply, VCC1
VCC2 16 Power supply, VCC2