ZHCSEH0 December   2015 ISO7310-Q1

PRODUCTION DATA.  

  1. 1 特性
  2. 2 应用
  3. 3 说明
  4. 4 修订历史记录
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Electrical Characteristics—5-V Supply
    6. 6.6  Supply Current Characteristics—5-V Supply
    7. 6.7  Electrical Characteristics—3.3-V Supply
    8. 6.8  Supply Current Characteristics—3.3-V Supply
    9. 6.9  Power Dissipation Characteristics
    10. 6.10 Switching Characteristics—5-V Supply
    11. 6.11 Switching Characteristics
    12. 6.12 Typical Characteristics
  7. 7 Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 High Voltage Feature Description
        1. 8.3.1.1 Insulation and Safety-Related Specifications for D-8 Package
        2. 8.3.1.2 Insulation Characteristics
        3. 8.3.1.3 Regulatory Information
        4. 8.3.1.4 Safety Limiting Values
    4. 8.4 Device Functional Modes
      1. 8.4.1 Device I/O Schematics
  9. 9 Applications and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
        1. 9.2.1.1 Typical Supply Current Equations
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Electromagnetic Compatibility (EMC) Considerations
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
      1. 11.1.1 PCB Material
    2. 11.2 Layout Example
  12. 12器件和文档支持
    1. 12.1 文档支持
      1. 12.1.1 相关文档　
    2. 12.2 社区资源
    3. 12.3 商标
    4. 12.4 静电放电警告
    5. 12.5 Glossary
  13. 13机械、封装和可订购信息

封装选项

请参考 PDF 数据表获取器件具体的封装图。

机械数据 (封装 | 引脚)
  • D|8
散热焊盘机械数据 (封装 | 引脚)
订购信息

9 Applications and Implementation

NOTE

Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality.

9.1 Application Information

The ISO7310-Q1 device uses single-ended TTL-logic switching technology. The supply voltage range is from 3 V to 5.5 V for both supplies, VCC1 and VCC2. When designing with digital isolators, keep in mind that due to the single-ended design structure, digital isolators do not conform to any specific interface standard and are only intended for isolating single-ended CMOS or TTL digital signal lines. The isolator is typically placed between the data controller (essentially μC or UART), and a data converter or a line transceiver, regardless of the interface type or standard.

9.2 Typical Application

The ISO7310-Q1 device can be used with a Texas Instruments’ microcontroller, CAN transceiver, transformer driver, and low-dropout voltage regulator to create an Isolated CAN Interface as shown in Figure 15.

ISO7310-Q1 typical_circuit_sller6.gif
1. Multiple pins and capacitors omitted for clarity purpose.
Figure 15. Isolated CAN Interface

9.2.1 Design Requirements

9.2.1.1 Typical Supply Current Equations

For the equations in this section, the following is true:

  • ICC1 and ICC2 are typical supply currents measured in mA
  • f is the data rate measured in Mbps
  • CL is the capacitive load measured in pF

At VCC1 = VCC2 = 5 V

Equation 1. ICC1 = 0.30517 + (0.01983 × f)
Equation 2. ICC2 = 1.40021 + (0.02879 × f) + (0.0021 × f × CL)


At VCC1 = VCC2 = 3.3 V

Equation 3. ICC1 = 0.18133 + (0.01166 × f)
Equation 4. ICC2 = 1.053 + (0.01607 × f) + (0.001488 × f × CL)

9.2.2 Detailed Design Procedure

Unlike optocouplers, which require external components to improve performance, provide bias, or limit current, the ISO7310-Q1 device only requires two external bypass capacitors to operate.

ISO7310-Q1 basic_app_llsEI8.gif Figure 16. Typical ISO7310-Q1 Circuit Hook-up

9.2.2.1 Electromagnetic Compatibility (EMC) Considerations

Many applications in harsh industrial environment are sensitive to disturbances such as electrostatic discharge (ESD), electrical fast transient (EFT), surge and electromagnetic emissions. These electromagnetic disturbances are regulated by international standards such as IEC 61000-4-x and CISPR 22. Although system-level performance and reliability depends, to a large extent, on the application board design and layout, the ISO7310-Q1 device incorporates many chip-level design improvements for overall system robustness. Some of these improvements include:

  • Robust ESD protection cells for input and output signal pins and inter-chip bond pads.
  • Low-resistance connectivity of ESD cells to supply and ground pins.
  • Enhanced performance of high voltage isolation capacitor for better tolerance of ESD, EFT and surge events.
  • Bigger on-chip decoupling capacitors to bypass undesirable high energy signals through a low impedance path.
  • PMOS and NMOS devices isolated from each other by using guard rings to avoid triggering of parasitic SCRs.
  • Reduced common mode currents across the isolation barrier by ensuring purely differential internal operation.

9.2.3 Application Curves

The following typical eye diagrams of the ISO7310-Q1 device indicate low jitter and wide open eye at the maximum data rate of 25 Mbps.

ISO7310-Q1 Eye_diagram_5v.png Figure 17. Eye Diagram at 25 Mbps, 5 V and 25°C
ISO7310-Q1 Eye_diagram_3.3v.png Figure 18. Eye Diagram at 25 Mbps, 3.3 V and 25°C