ZHCS793C March   2012  – January 2021 INA282-Q1 , INA283-Q1 , INA284-Q1 , INA285-Q1 , INA286-Q1

PRODUCTION DATA  

  1. 特性
  2. 应用
  3. 说明
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Selecting RS
      2. 7.3.2 Effective Bandwidth
      3. 7.3.3 Transient Protection
    4. 7.4 Device Functional Modes
      1. 7.4.1 Reference Pin Connection Options
        1. 7.4.1.1 Unidirectional Operation
          1. 7.4.1.1.1 Ground Referenced Output
          2. 7.4.1.1.2 V+ Referenced Output
        2. 7.4.1.2 Bidirectional Operation
          1. 7.4.1.2.1 External Reference Output
          2. 7.4.1.2.2 Splitting the Supply
          3. 7.4.1.2.3 Splitting an External Reference
      2. 7.4.2 Shutdown
      3. 7.4.3 Extended Negative Common-Mode Range
      4. 7.4.4 Calculating Total Error
        1. 7.4.4.1 Example 1 INA282-Q1
        2. 7.4.4.2 Example 2 INA286-Q1
  8. Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Basic Connections
    2. 8.2 Typical Applications
      1. 8.2.1 Current Summing
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedures
        3. 8.2.1.3 Application Curve
      2. 8.2.2 Current Differencing
        1. 8.2.2.1 Design Requirements
        2. 8.2.2.2 Detailed Design Procedure
        3. 8.2.2.3 Application Curve
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 接收文档更新通知
    2. 11.2 支持资源
    3. 11.3 Trademarks
    4. 11.4 静电放电警告
  12. 12术语表
  13. 13Mechanical, Packaging, and Orderable Information

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

Electrical Characteristics

at TA = 25°C, V+ = 5 V, V+IN = 12 V, VREF1 = VREF2 = 2.048 V referenced to GND, and VSENSE = V+IN – V–IN, unless otherwise noted.
PARAMETERTEST CONDITIONSMINTYPMAXUNIT
INPUT
VOSOffset Voltage, RTI(1)VSENSE = 0 mV±20±70μV
dVOS/dTvs TemperatureTA = –40°C to 125°C±0.3±1.5μV/°C
PSRRvs Power SupplyVS = 2.7 V to 18 V, VSENSE = 0 mV3μV/V
VCMCommon-Mode Input RangeTA = –40°C to 125°C–14+80V
CMRRCommon-Mode RejectionV+IN = –14 V to 80 V, VSENSE = 0 mV
TA = –40°C to 125°C
120140dB
IBInput Bias Current per Pin(2)VSENSE = 0 mV25μA
IOSInput Offset CurrentVSENSE = 0 mV1μA
Differential Input Impedance6kΩ
REFERENCE INPUTS
Reference Input Gain1V/V
Reference Input Voltage Range(3)0VGND + 9V
Divider Accuracy(4)±0.2%±0.5%
RVRRReference Voltage Rejection Ratio
(VREF1 = VREF2 = 40 mV to 9 V,
V+ = 18 V)
INA282-Q1±25±75μV/V
TA = –40°C to 125°C0.055μV/V/°C
INA283-Q1±13±30μV/V
TA = –40°C to 125°C0.040μV/V/°C
INA284-Q1±6±25μV/V
TA = –40°C to 125°C0.015μV/V/°C
INA285-Q1±4±10μV/V
TA = –40°C to 125°C0.010μV/V/°C
INA286-Q1±17±45μV/V
TA = –40°C to 125°C0.040μV/V/°C
GAIN(6) (GND + 0.5 V ≤ VOUT ≤ (V+) – 0.5 V; VREF1 = VREF2 = (V+) / 2 for all devices)
GGainINA282-Q1, V+ = 5 V50V/V
INA283-Q1, V+ = 5 V200V/V
INA284-Q1, V+ = 5 V500V/V
INA285-Q1, V+ = 5 V1000V/V
INA286-Q1, V+ = 5 V100V/V
Gain ErrorINA282-Q1, INA283-Q1, INA286-Q1±0.4%±1.4%
INA284-Q1, INA285-Q1±0.4%±1.6%
TA = –40°C to 125°C0.00080.005%/°C
OUTPUT
Nonlinearity Error±0.01%
Output Impedance1.5
Maximum Capacitive LoadNo sustained oscillation1nF
VOLTAGE OUTPUT (5)
Swing to V+ Power-Supply RailV+ = 5 V, RLOAD = 10 kΩ to GND
TA = –40°C to 125°C
(V+)–0.17(V+)–0.4V
Swing to GNDTA = –40°C to 125°CGND+0.015GND+0.04V
FREQUENCY RESPONSE
BWEffective Bandwidth(7)INA282-Q110kHz
INA283-Q110
INA284-Q14
INA285-Q12
INA286-Q110
NOISE, RTI (1)
Voltage Noise Density1 kHz110nV/√ Hz
POWER SUPPLY
VSSpecified Voltage RangeTA = –40°C to 125°C2.718V
IQQuiescent Current600900μA
TEMPERATURE RANGE
Specified Range–40125°C
RTI = referred-to-input.
See typical characteristic graph Figure 6-7 .
The average of the voltage on pins REF1 and REF2 must be between VGND and the lesser of (VGND+9 V) and V+.
Reference divider accuracy specifies the match between the reference divider resistors using the configuration in Figure 7-5.
See typical characteristic graphs Figure 6-16 through Figure 6-18.
See typical characteristic graph Figure 6-12.
See typical characteristic graph Figure 6-1 and Section 7.3.2 in the Applications Information.