SBOS360F Data sheet | 德州仪器 TI.com.cn

7.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted) ⁽¹⁾

		MIN	MAX	UNIT
Supply voltage, V_s			18	V
Current-shunt monitor analog inputs, V_IN+ and V_IN–	Differential (V_IN+) – (V_IN–)	–18	18	V
Current-shunt monitor analog inputs, V_IN+ and V_IN–	Common-Mode	–16	80	V
Comparator analog input and reset pins		GND – 0.3	(V_s) + 0.3	V
Analog output, out pin		GND – 0.3	(V_s) + 0.3	V
Comparator output, out pin		GND – 0.3	18	V
V_REF and CMP2 delay pin		GND – 0.3	10	V
Input current into any pin			5	mA
Operating temperature		–55	150	°C
Junction temperature		–65	150	°C
Storage temperature, T_stg		–65	150	°C

(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

7.2 ESD Ratings

			VALUE		UNIT
V_(ESD)	Electrostatic discharge	Human body model (HBM), per ANSI/ESDA/JEDEC JS-001⁽¹⁾	±4000		V
V_(ESD)	Electrostatic discharge	Charged device model (CDM), per JEDEC specification JESD22-C101⁽²⁾	±500		V

(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.

(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

7.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)

	MIN	NOM	MAX	UNIT
Vcm Common-mode input voltage	–16	12	80	V
Vs Operating supply voltage	2.7	12	18	V
T_A Operating free-air temperature	–40	25	125	ºC

7.4 Thermal Information

THERMAL METRIC ⁽¹⁾		INA20x			UNIT
		D (SOIC)	DGS (VSSOP)	PW (TSSOP)
		14 PINS	10 PINS	14 PINS
R_θJA	Junction-to-ambient thermal resistance	84.9	161.3	112.6	°C/W
R_θJC(top)	Junction-to-case (top) thermal resistance	44	36.8	37.2	°C/W
R_θJB	Junction-to-board thermal resistance	39.4	82.3	55.4	°C/W
ψ_JT	Junction-to-top characterization parameter	10.3	1.3	2.7	°C/W
ψ_JB	Junction-to-board characterization parameter	39.1	80.8	54.7	°C/W
R_θJC(bot)	Junction-to-case (bottom) thermal resistance	150	200	150	°C/W

(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report, SPRA953.

7.5 Electrical Characteristics: Current-Shunt Monitor

At T_A = 25°C, V_S = 12 V, V_IN+ = 12 V, V_SENSE = 100 mV, R_L = 10 kΩ to GND, R_PULL-UP = 5.1 kΩ each connected from CMP1 OUT and CMP2 OUT to V_S, and CMP1 IN+ = 1 V and CMP2 IN– = GND, unless otherwise noted.

PARAMETERS		TEST CONDITIONS		MIN	TYP	MAX	UNIT
INPUT
V_SENSE	Full-scale sense input voltage	V_SENSE = V_IN+ – V_IN–			0.15	(V_S –0.25)/Gain	V
V_CM	Common-mode input range	T_A = –40°C to 125°C		–16		80	V
CMRR	Common-mode rejection ratio	V_IN+ = –16 V to 80 V		80	100		dB
CMRR	Common-mode rejection ratio over temperature	V_IN+ = 12 V to 80 V, T_A = –40°C to 125°C		100		123	dB
V_OS	Offset voltage RTI ⁽¹⁾	T_A = 25°C			±0.5	±2.5	mV
		T_A = 25°C to 125°C				±3
		T_A = –40°C to 25°C				±3.5
dV_OS/dT	Offset voltage RTI vs temperature	T_A = –40°C to 125°C			5		µV/°C
PSR	Offset voltage RTI vs power supply	V_OUT = 2 V, V_IN+ = 18 V, 2.7 V, T_A = –40°C to 125°C			2.5	100	µV/V
I_B	Input bias current, V_IN– Pin	T_A = –40°C to 125°C			±9	±16	µA
OUTPUT (V_SENSE ≥ 20 mV)
G	Gain	INA206			20		V/V
		INA207			50
		INA208			100
	Gain error	V_SENSE = 20 mV to 100 mV			±0.2%	±1%
	Gain error over temperature	V_SENSE = 20 mV to 100 mV, T_A = –40°C to 125°C				±2%
	Total output error ⁽²⁾	V_SENSE = 120 mV, V_S = 16 V			±0.75%	±2.2%
	Total output error over temperature	V_SENSE = 120 mV, V_S = 16 V, T_A = –40°C to 125°C				±3.5%
	Nonlinearity error ⁽³⁾	V_SENSE = 20 mV to 100 mV			±0.002%
R_O	Output impedance				1.5		Ω
	Maximum capacitive load	No Sustained Oscillation			10		nF
OUTPUT (VSENSE < 20 mV) ⁽⁴⁾
	Output voltage	INA206	–16 V ≤ V_CM < 0 V		300		mV
		INA207			300
		INA208			300
		INA206	0 V ≤ V_CM ≤ V_S, V_S = 5 V			0.4	V
		INA207				1
		INA208				2
		INA206	V_S < V_CM ≤ 80 V		300		mV
		INA207			300
		INA208			300
VOLTAGE OUTPUT
	Output swing to the positive rail	V_IN– = 11 V, V_IN+ = 12 V, T_A = –40°C to 125°C			(V_s) – 0.15	(V_s) – 0.25	V
	Output swing to GND ⁽⁵⁾	V_IN– = 0 V, V_IN+ = –0.5 V, T_A = –40°C to 125°C			(V_GND) + 0.004	(V_GND) + 0.05	V
FREQUENCY RESPONSE
	Bandwidth	INA206	C_LOAD = 5 pF		500		kHz
		INA207			300
		INA208			200
	Phase margin	C_LOAD < 10 pF			40		°
	Slew rate				1		V/µs
	Settling time (1%)	V_SENSE = 10 mV_PP to 100 mV_PP, C_LOAD = 5 pF			2		µs
NOISE, RTI
	Output voltage noise density				40		nV/√Hz

(1) Offset is extrapolated from measurements of the output at 20 mV and 100 mV V_SENSE.

(2) Total output error includes effects of gain error and V_OS.

(3) Linearity is best fit to a straight line.

(4) For details on this region of operation, see the Accuracy Variations as a Result of VSENSE and Common-Mode Voltage section.

(5) Specified by design.

7.6 Electrical Characteristics: Comparator

At T_A = 25°C, V_S = 12 V, V_IN+ = 12 V, V_SENSE = 100 mV, R_L = 10 kΩ to GND, R_PULL-UP = 5.1 kΩ each connected from CMP1 OUT and CMP2 OUT to V_S, unless otherwise noted.

PARAMETERS	TEST CONDITIONS	MIN	TYP	MAX	UNIT
OFFSET VOLTAGE
Offset Voltage	Comparator Common-Mode Voltage = Threshold Voltage, Figure 1		2		mV
Offset Voltage Drift, Comparator 1	T_A = –40°C to 125°C		±2		µV/°C
Offset Voltage Drift, Comparator 2	T_A = –40°C to 125°C		5.4		µV/°C
Threshold	T_A = 25°C	590	608	620	mV
Threshold over Temperature	T_A = –40°C to 125°C	586		625	mV
Hysteresis ⁽¹⁾, CMP1	T_A = –40°C to 85C		–8		mV
Hysteresis ⁽¹⁾, CMP2	T_A = –40°C to 85°C		8		mV
INPUT BIAS CURRENT ⁽²⁾
CMP1 IN+, CMP2 IN–			0.005	10	nA
CMP1 IN+, CMP2 IN– vs Temperature	T_A = –40°C to 125°C			15	nA
INPUT IMPEDANCE
Pins 3 and 6 (14-pin packages only)			10		kΩ
INPUT RANGE
CMP1 IN+ and CMP2 IN–			0 V to V_S – 1.5V		V
Pins 3 and 6 (14-pin packages only) (3)			0 V to V_S – 1.5V		V
OUTPUT
Large-signal differential voltage gain	CMP V_OUT 1 V to 4 V, R_L ≥ 15 kΩ connected to 5 V		200		V/mV
High-level output current	V_ID= 0.4 V, V_OH = V_S		0.0001	1	µA
Low-level output voltage	V_ID = –0.6 V, I_OL = 2.35 mA		220	300	mV
RESPONSE TIME ⁽³⁾
Comparator 1	R_L to 5 V, C_L = 15 pF, 100-mV Input Step with 5-mV Overdrive		1.3		µs
Comparator 2	R_L to 5 V, C_L = 15 pF, 100-mV Input Step with 5-mV Overdrive, C_DELAY Pin Open		1.3		µs
RESET
RESET Threshold ⁽⁴⁾			1.1		V
Logic Input Impedance			2		mΩ
Minimum RESET Pulse Width			1.5		µs
RESET Propagation Delay			3		µs
Comparator 2 Delay Equation ⁽⁵⁾			C_DELAY = t_D/5		µF
Comparator 2 Delay, t_D	C_DELAY= 0.1 μF		0.5		s

(1) Hysteresis refers to the threshold (the threshold specification applies to a rising edge of a noninverting input) of a falling edge on the noninverting input of the comparator. See Figure 1.

(2) Specified by design.

(3) The comparator response time specified is the interval between the input step function and the instant when the output crosses 1.4 V.

(4) RESET input has an internal 2 MΩ (typical) pull-down. Leaving RESET open results in a LOW state, with transparent comparator operation.

(5) The Comparator 2 delay applies to both rising and falling edges of the comparator output.

7.7 Electrical Characteristics: Reference

At T_A = 25°C, V_S = 12 V, V_IN+ = 12 V, V_SENSE = 100 mV, R_L = 10 kΩ to GND, R_PULL-UP = 5.1 kΩ each connected from CMP1 OUT and CMP2 OUT to V_S, unless otherwise noted.

PARAMETERS		TEST CONDITIONS	MIN	TYP	MAX	UNIT
REFERENCE VOLTAGE
	1.2V_REFOUT Output Voltage		1.188	1.2	1.212	V
dV_OUT/dT	Reference Drift	T_A = –40°C to 85°C		40	100	ppm/°C
	0.6VREF Output Voltage (Pins 3 and 6 of 14-pin packages only)			0.6		V
dV_OUT/dT	Reference Drift	T_A = –40°C to 85°C		40	100	ppm/°C
dV_OUT/dI_LOAD	LOAD REGULATION
	Sourcing	0 mA < I_SOURCE < 0.5 mA		0.4	2	mV/mA
	Sinking	0 mA < I_SINK < 0.5 mA		0.4		mV/mA
I_LOAD	LOAD CURRENT	T_A = –40°C to 125°C		1		mA
dV_OUT/dV_S	LINE REGULATION	2.7 V < V_S < 18 V, T_A = –40°C to 125°C		30		µV/V
	CAPACITIVE LOAD
	Reference Output Maximum Capacitive Load	No Sustained Oscillations		10		nF
	OUTPUT IMPEDANCE
	Pins 3 and 6 of 14-Pin Packages Only			10		kΩ

7.8 Electrical Characteristics: General

At T_A = 25°C, V_S = 12 V, V_IN+ = 12 V, V_SENSE = 100 mV, R_L = 10 kΩ to GND, R_PULL-UP = 5.1 kΩ each connected from CMP1 OUT and CMP2 OUT to V_S, and CMP1 IN+ = 1 V and CMP2 IN– = GND, unless otherwise noted.

PARAMETERS		TEST CONDITIONS	MIN	TYP	MAX	UNIT
POWER SUPPLY
V_S	Operating Power Supply	T_A = –40°C to 125°C	2.7		18	V
I_Q	Quiescent Current	V_OUT = 2 V		1.8	2.2	mA
I_Q	Quiescent Current over Temperature	V_SENSE = 0 mV, T_A = –40°C to 125°C			2.8	mA
	Comparator Power-On Reset Threshold ⁽¹⁾			1.5		V
TEMPERATURE
	Specified Temperature Range		–40		125	°C
	Operating Temperature Range		–55		150	°C
	Storage Temperature Range		–65		150	°C
θ_JA	Thermal Resistance	MSOP-10 Surface-Mount		200		°C/W
θ_JA	Thermal Resistance	SO-14, TSSOP-14 Surface-Mount		150		°C/W

(1) The INA206, INA207, and INA208 are designed to power-up with the comparator in a defined reset state as long as CMP1 RESET is open or grounded. The comparator will be in reset as long as the power supply is below the voltage shown here. The comparator will assume a state based on the comparator input above this supply voltage. If CMP1 RESET is high at power-up, the comparator output comes up high and requires a reset to assume a low state, if appropriate.