ZHCSH49 December   2017 HD3SS3412A

PRODUCTION DATA.  

  1. 特性
  2. 应用
  3. 说明
    1.     Device Images
      1.      HD3SS3412A 引脚
      2.      HD3SS3412A 开关直通布线
  4. 修订历史记录
  5. 说明 (续)
  6. Pin Configuration and Functions
    1.     Pin Functions
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Dissipation Ratings
    7. 7.7 Typical Characteristics
  8. Parameter Measurement Information
  9. Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
    4. 9.4 Device Functional Modes
  10. 10Application and Implementation
    1. 10.1 Application Information
      1. 10.1.1 AC Coupling Caps
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
      3. 10.2.3 Application Curves
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  13. 13器件和文档支持
    1. 13.1 接收文档更新通知
    2. 13.2 社区资源
    3. 13.3 商标
    4. 13.4 静电放电警告
    5. 13.5 Glossary
  14. 14机械、封装和可订购信息

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

Overview

The HD3SS3412A is a high-speed passive switch offered in an industry standard 42-pin WQFN package available in a common footprint shared by several other vendors. The device is specified to operate from a single supply voltage of 3.3 V over the commercial temperature range of 0°C to 70°C. The HD3SS3412A is a generic 4-CH high-speed mux/demux type of switch that can be used for routing high-speed signals between two different locations on a circuit board. Although it was designed specifically to address PCI Express Gen III applications, the HD3SS3412A will also support several other high-speed data protocols with a differential amplitude of < 1800 mVpp and a common-mode voltage of < 2.0 V, as with USB 3.0 and DisplayPort 1.2. The device’s one select input (SEL) pin can easily be controlled by an available GPIO pin within a system or from a microcontroller.