ZHCSB33J October   2010  – November 2014 DS90UH925Q-Q1

PRODUCTION DATA.  

  1. 特性
  2. 应用范围
  3. 说明
  4. 修订历史记录
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  Handling Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  DC Electrical Characteristics
    6. 6.6  AC Electrical Characteristics
    7. 6.7  DC and AC Serial Control Bus Characteristics
    8. 6.8  Recommended Timing for Serial Control Bus
    9. 6.9  Switching Characteristics
    10. 6.10 Typical Charateristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  High Speed Forward Channel Data Transfer
      2. 7.3.2  Low Speed Back Channel Data Transfer
      3. 7.3.3  Backward Compatible Mode
      4. 7.3.4  Common Mode Filter Pin (CMF)
      5. 7.3.5  Video Control Signal Filter
      6. 7.3.6  Power Down (PDB)
      7. 7.3.7  Remote Auto Power Down Mode
      8. 7.3.8  LVCMOS VDDIO Option
      9. 7.3.9  Input PCLK Loss Detect
      10. 7.3.10 Serial Link Fault Detect
      11. 7.3.11 Pixel Clock Edge Select (RFB)
      12. 7.3.12 Low Frequency Optimization (LFMODE)
      13. 7.3.13 Interrupt Pin — Functional Description and Usage (INTB)
      14. 7.3.14 EMI Reduction Features
        1. 7.3.14.1 Input SSC Tolerance (SSCT)
        2. 7.3.14.2 GPIO[3:0] and GPO_REG[8:4]
          1. 7.3.14.2.1 GPIO[3:0] Enable Sequence
          2. 7.3.14.2.2 GPO_REG[8:4] Enable Sequence
        3. 7.3.14.3 I2S Transmitting
          1. 7.3.14.3.1 Secondary I2S Channel
        4. 7.3.14.4 HDCP
        5. 7.3.14.5 Built In Self Test (BIST)
          1. 7.3.14.5.1 BIST Configuration and Status
            1. 7.3.14.5.1.1 Sample BIST Sequence
          2. 7.3.14.5.2 Forward Channel and Back Channel Error Checking
        6. 7.3.14.6 Internal Pattern Generation
    4. 7.4 Device Functional Modes
      1. 7.4.1 Configuration Select (MODE_SEL)
      2. 7.4.2 HDCP Repeater
      3. 7.4.3 Repeater Configuration
      4. 7.4.4 Repeater Connections
    5. 7.5 Programming
      1. 7.5.1 Serial Control Bus
    6. 7.6 Register Maps
  8. Applications and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curves
  9. Power Supply Recommendations
    1. 9.1 Power Up Requirements and PDB Pin
    2. 9.2 CML Interconnect Guidelines
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11器件和文档支持
    1. 11.1 文档支持
      1. 11.1.1 相关文档 
    2. 11.2 商标
    3. 11.3 静电放电警告
    4. 11.4 术语表
  12. 12机械封装和可订购信息

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

4 修订历史记录

Changes from I Revision (April 2013) to J Revision

  • 已添加、更新或重命名以下部分:器件信息表,引脚配置和功能,应用和实施;电源相关建议;布局;器件和文档支持;机械、封装和订购信息Go
  • Fixed typo for GPIO configurationGo
  • Removed two MODE_SEL modes: I2S Channel B, and Backward CompatibleGo
  • Removed IDx addresses 0x22, 0x24, 0x2C, 0x2E, 0x30, 0x32, 0x34Go
  • Changed suggested resistor values for IDx addresses 0x1E, 0x20, 0x26, 0x28, 0x2AGo

Changes from H Revision (October 2010) to I Revision

  • Changed 版面布局从国家数据表风格更改为 TI 格式。Go