SNLS714 September   2022 DS320PR822

PRODUCTION DATA  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 DC Electrical Characteristics
    6. 6.6 High Speed Electrical Characteristics
    7. 6.7 SMBUS/I2C Timing Charateristics
    8. 6.8 Typical Characteristics
    9. 6.9 Typical Jitter Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Linear Equalization
      2. 7.3.2 Flat-Gain
      3. 7.3.3 Receiver Detect State Machine
      4. 7.3.4 Cross Point
    4. 7.4 Device Functional Modes
      1. 7.4.1 Active PCIe Mode
      2. 7.4.2 Active Buffer Mode
      3. 7.4.3 Standby Mode
    5. 7.5 Programming
      1. 7.5.1 Pin Mode
        1. 7.5.1.1 Five-Level Control Inputs
      2. 7.5.2 SMBUS/I2C Register Control Interface
        1. 7.5.2.1 Shared Registers
        2. 7.5.2.2 Channel Registers
      3. 7.5.3 SMBus/I 2 C Primary Mode Configuration (EEPROM Self Load)
  8. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 UPI x24 Lane Cross-Point Configuration
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curves
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Receiving Notification of Documentation Updates
    2. 11.2 Support Resources
    3. 11.3 Trademarks
    4. 11.4 Electrostatic Discharge Caution
    5. 11.5 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

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SMBus/I2C Primary Mode Configuration (EEPROM Self Load)

The DS320PR822 can also be configured by reading from EEPROM. To enter into this mode MODE pin must be set to L1. The EEPROM load operation only happens once after the device's initial power-up. If the DS320PR822 is configured for SMBus Primary mode, then it will remain in the SMBus IDLE state until the READ_EN_N pin is asserted to LOW. After the READ_EN_N pin is driven LOW, the DS320PR822 becomes an SMBus primary and attempts to self-configure by reading the device settings stored in an external EEPROM (SMBus 8-bit address 0xA0). When the DS320PR822 has finished reading from the EEPROM successfully, it will drive the ALL_DONE_N pin LOW. SMBus/I2C secondary operation is available in this mode before, during, or after EEPROM reading. Note: during EEPROM reading, if the external SMBus/I2C primary wants to access DS320PR822 registers, then it must support arbitration.

When designing a system for using the external EEPROM, the user must follow these specific guidelines:

  • EEPROM size of 2 kb (256 × 8-bit) is recommended.
  • Set MODE = L1, configure for SMBus Primary mode.
  • The external EEPROM device address byte must be 0xA0 and capable of 400 kHz operation at 3.3 V supply
  • In SMBus/I2C modes the SCL and SDA pins must be pulled up to a 3.3 V supply with a pull-up resistor. The value of the resistor depends on total bus capacitance. 4.7 kΩ is a good first approximation for a bus capacitance of 10 pF.

Figure 7-2 shows a use case with four DS320PR822 to implement a 2x2 cross point for x8 PCIe configuration, but the user can cascade any number of DS320PR822 devices in a similar way. Tie the READ_EN_N pin of the first device low to automatically initiate EEPROM read at power up. Alternatively, the READ_EN_N pin of the first device can also be controlled by a micro-controller to initiate the EEPROM read manually. Leave the ALL_DONE_N pin of the final device floating, or connect the pin to a micro-controller input to monitor the completion of the final EEPROM read.

GUID-20210507-CA0I-F2FG-FBDG-9N02R9NGFLMC-low.gif Figure 7-2 Daisy Chain Four DS320PR822 Devices to Read from Single EEPROM in 2x2 x8 Configuration