ZHCSLP6 december   2020 DS160UP822

PRODUCTION DATA  

  1.   1
  2. 1 特性
  3. 2 应用
  4. 3 说明
  5. 4 Revision History
  6. 5 Pin Configuration and Functions
    1.     Pin Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 DC Electrical Characteristics
    6. 6.6 High Speed Electrical Characteristics
    7. 6.7 SMBUS/I2C Timing Characteristics
    8. 6.8 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Linear Equalization
      2. 7.3.2 Flat Gain
      3. 7.3.3 Cross Point
    4. 7.4 Device Functional Modes
      1. 7.4.1 Active Mode
      2. 7.4.2 Standby Mode
    5. 7.5 Programming
      1. 7.5.1 Control and Configuration Interface
        1. 7.5.1.1 Pin Mode
          1. 7.5.1.1.1 Four-Level Control Inputs
        2. 7.5.1.2 SMBUS/I2C Register Control Interface
        3. 7.5.1.3 SMBus/I 2 C Master Mode Configuration (EEPROM Self Load)
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 UPI 2x2 Cross Point Mux for x24 Lane Configuration
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curves
  10. 9 Power Supply Recommendations
  11. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  12. 11Device and Documentation Support
    1. 11.1 Receiving Notification of Documentation Updates
    2. 11.2 Community Resources
    3. 11.3 Trademarks
  13. 12Mechanical, Packaging, and Orderable Information

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8.2.1.3 Application Curves

The DS160UP822 is a linear redriver that can be used to extend channel reach of a UPI link. Normally, PCIe-compliant TX and RX are equipt with signal-conditioning functions and can handle channel losses of up to 28 dB at 8 GHz. With the DS160UP822 in the link, the total channel loss between two CPUs can be up to 42 dB at 8 GHz.

Figure 8-3 shows an electric link that models a single channel of a UPI link and eye diagrams measured at different locations along the link. The source that models a UPI TX sends a 16 Gbps PRBS-15 signal with P7 presets. After a transmission channel with –30 dB at 8 GHz insertion loss, the eye diagram is fully closed. The DS160UP822 with its CTLE set to the maximum (18 dB boost) together with the source TX equalization compensates for the losses of the pre-channel (TL1) and opens the eye at the output of the device.

The post-channel (TL2) losses mandate the use of UPI RX equalization functions such as CTLE and DFE that are normally available in receivers.

GUID-20201116-CA0I-1BT7-QWBL-DXWNZVXJCDHV-low.gif Figure 8-3 UPI 2.0 Link Reach Extension Using DS160UP822