15 |
Reset |
W,SC |
0x0 |
PHY Software Reset: Writing a 1 to this bit resets the PHY PCS registers. When the reset operation is done, this bit is cleared to 0 automatically. PHY Vendor Specific registers will not be cleared.
0x0 = Normal Operation
0x1 = Initiate software Reset / Reset in Progress
|
14 |
MII_Loopback |
R/W |
0x0 |
MII Loopback: When MII loopback mode is activated, the transmitted data presented on MII TXD is looped back to MII RXD internally. Applicable for the only available RMII interface. It also needs to set following additional bit BISCR 0x0016[4:0] = 0b00100 for 100Base-TX and BISCR 0x0016[4:0] = 00001b for 10Base-Te
0x0 = Normal Operation
0x1 = MII Loopback enabled
|
13 |
Speed_Selection |
R/W |
0x1 |
Speed Select: When Auto-Negotiation is disabled (bit [12] = 0 in Register 0x0000), writing to this bit allows the port speed to be selected.
0x0 = 10 Mbps
0x1 = 100 Mbps
|
12 |
Auto-Negotiation_Enable |
R/W,STRAP(ANEG_Dis) |
0x1 |
Auto-Negotiation Enable:
0x0 = Disable Auto-Negotiation - bits [8] and [13] determine the port speed and duplex mode
0x1 = Enable Auto-Negotiation - bits [8] and [13] of this register are ignored when this bit is set
|
11 |
IEEE_Power_Down |
R/W |
0x0 |
Power Down: The PHY is powered down after this bit is set. Only register access is enabled during this power down condition. To control the power down mechanism, this bit is OR'ed with the input from the INT/PWDN_N pin. When the active low INT/PWDN_N is asserted, this bit is set.
0x0 = Normal Operation
0x1 = IEEE Power Down
|
10 |
Isolate |
R/W |
0x0 |
Isolate:
0x0 = Normal Operation
0x1 = Isolates the port from the MII with the exception of the serial management interface. It also disables50MHz clock in RMII Master Mode
|
9 |
Restart_Auto-Negotiation |
R/W,SC |
0x0 |
Restart Auto-Negotiation: If Auto-Negotiation is disabled (bit [12] = 0), bit [9] is ignored. This bit is self-clearing and will return a value of 1 until Auto-Negotiation is initiated, whereupon it will self-clear. Operation of the Auto-Negotiation process is not affected by the management entity clearing this bit.
0x0 = Normal Operation
0x1 = Restarts Auto-Negotiation, Re-initiates the Auto-Negotiation process
|
8 |
Duplex_Mode |
R/W |
0x1 |
Duplex Mode: When Auto-Negotiation is disabled, writing to this bit allows the port Duplex capability to be selected.
0x0 = Half-Duplex
0x1 = Full-Duplex
|
7 |
Collision_Test |
R/W |
0x0 |
Collision Test: When set, this bit causes the COL signal to be asserted in response to the assertion of TX_EN within 512 bit times. The COL signal is de-asserted within 4 bit times in response to the de-assertion to TX_EN.
0x0 = Normal Operation
0x1 = Enable COL Signal Test
|
6-0 |
RESERVED |
R |
0x0 |
Reserved
|