SBAS246B December   2001  – November 2014 DAC8532

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Simplified Diagram
  5. 5 Revision History
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 Handling Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Timing Requirements
    7. 7.7 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 DAC Section
      2. 8.3.2 Resistor String
      3. 8.3.3 Output Amplifier
      4. 8.3.4 Serial Interface
      5. 8.3.5 Power-On Reset
    4. 8.4 Device Functional Modes
      1. 8.4.1 Input Shift Register
      2. 8.4.2 SYNC Interrupt
      3. 8.4.3 Power-Down Modes
    5. 8.5 Register Maps
      1. 8.5.1 Operation Examples
  9. 9 Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 Current Consumption
      2. 9.1.2 Driving Resistive and Capacitive Loads
      3. 9.1.3 Crosstalk and AC Performance
      4. 9.1.4 Output Voltage Stability
      5. 9.1.5 Settling Time and Output Glitch Performance
      6. 9.1.6 Microprocessor Interfacing
        1. 9.1.6.1 DAC8532 to 8051 Interface
        2. 9.1.6.2 DAC8532 to Microwire Interface
        3. 9.1.6.3 DAC8532 to 68HC11 Interface
      7. 9.1.7 DAC8532 to TMS320 DSP Interface
      8. 9.1.8 Bipolar Operation Using the DAC8532
    2. 9.2 Typical Application
      1. 9.2.1 Using REF5050 as a Power Supply for DAC8532
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
        3. 9.2.1.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Trademarks
    2. 12.2 Electrostatic Discharge Caution
    3. 12.3 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

封装选项

请参考 PDF 数据表获取器件具体的封装图。

机械数据 (封装 | 引脚)
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散热焊盘机械数据 (封装 | 引脚)
订购信息

11 Layout

11.1 Layout Guidelines

A precision analog component requires careful layout, adequate bypassing, and clean, well-regulated power supplies.

The DAC8532 offers single-supply operation, and it will often be used in close proximity with digital logic, microcontrollers, microprocessors, and digital signal processors. The more digital logic present in the design and the higher the switching speed, the more difficult it will be to keep digital noise from appearing at the output.

Due to the single ground pin of the DAC8532, all return currents, including digital and analog return currents for the DAC, must flow through a single point. Ideally, GND would be connected directly to an analog ground plane. This plane would be separate from the ground connection for the digital components until they were connected at the power entry point of the system.

The power applied to VDD should be well regulated and low noise. Switching power supplies and DC/DC converters will often have high-frequency glitches or spikes riding on the output voltage. In addition, digital components can create similar high-frequency spikes as their internal logic switches states. This noise can easily couple into the DAC output voltage through various paths between the power connections and analog output.

As with the GND connection, VDD should be connected to a positive power-supply plane or trace that is separate from the connection for digital logic until they are connected at the power entry point. In addition, a 1 µF to 10 µF capacitor in parallel with a 0.1 µF bypass capacitor is strongly recommended. In some situations, additional bypassing may be required, such as a 100 µF electrolytic capacitor or even a Pi filter made up of inductors and capacitors—all designed to low-pass filter the supply, removing the high-frequency noise.

11.2 Layout Example

layout_SBAS246.gif
Fast moving transients common in digital IO can cause digital feed-through on the analog outputs. Route analog IO traces away from any digital IO traces in order to minimize digital feed-through.
Figure 43. Layout Example