ZHCS110E March   2011  – February 2017 CSD87350Q5D

PRODUCTION DATA.  

  1. 1特性
  2. 2应用范围
  3. 3说明
  4. 4修订历史记录
  5. 5Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 Recommended Operating Conditions
    3. 5.3 Thermal Information
    4. 5.4 Power Block Performance
    5. 5.5 Electrical Characteristics
    6. 5.6 Typical Power Block Device Characteristics
    7. 5.7 Typical Power Block MOSFET Characteristics
  6. 6Application and Implementation
    1. 6.1 Application Information
      1. 6.1.1 Equivalent System Performance
      2. 6.1.2 Power Loss Curves
      3. 6.1.3 Safe Operating Area (SOA) Curves
      4. 6.1.4 Normalized Curves
    2. 6.2 Typical Application
      1. 6.2.1 Design Example: Calculating Power Loss and SOA
      2. 6.2.2 Operating Conditions
        1. 6.2.2.1 Calculating Power Loss
        2. 6.2.2.2 Calculating SOA Adjustments
  7. 7Layout
    1. 7.1 Layout Guidelines
      1. 7.1.1 Electrical Performance
      2. 7.1.2 Thermal Considerations
    2. 7.2 Layout Example
  8. 8器件和文档支持
    1. 8.1 文档支持
      1. 8.1.1 相关文档　
    2. 8.2 接收文档更新通知
    3. 8.3 社区资源
    4. 8.4 商标
    5. 8.5 静电放电警告
    6. 8.6 Glossary
  9. 9机械、封装和可订购信息
    1. 9.1 Q5D 封装尺寸
    2. 9.2 焊盘布局建议
    3. 9.3 模板建议
    4. 9.4 Q5D 卷带信息

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

5 Specifications

5.1 Absolute Maximum Ratings

TA = 25°C (unless otherwise noted)(1)
MIN MAX UNIT
Voltage VIN to PGND –0.8 30 V
TG to TGR –8 10 V
BG to PGND –8 10 V
IDM Pulsed current rating(2) 120 A
PD Power dissipation 12 W
EAS Avalanche energy Sync FET, ID = 105 A, L = 0.1 mH 551 mJ
Control FET, ID = 60 A, L = 0.1 mH 180
TJ Operating junction temperature –55 150 °C
Tstg Storage temperature –55 150 °C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the Recommended Operating Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) Pulse duration ≤ 50 µs. Duty cycle ≤ 0.01%.

5.2 Recommended Operating Conditions

TA = 25° (unless otherwise noted)
MIN MAX UNIT
VGS Gate drive voltage 4.5 8 V
VIN Input supply voltage 27 V
ƒSW Switching frequency CBST = 0.1 μF (min) 200 1500 kHz
Operating current 40 A
TJ Operating temperature 125 °C

5.3 Thermal Information

TA = 25°C (unless otherwise stated)
THERMAL METRIC MIN TYP MAX UNIT
RθJA Junction-to-ambient thermal resistance (min Cu)(1)(2) 102 °C/W
Junction-to-ambient thermal resistance (max Cu)(1)(2) 50 °C/W
RθJC Junction-to-case thermal resistance (top of package)(2) 20 °C/W
Junction-to-case thermal resistance (PGND pin)(2) 2 °C/W
(1) Device mounted on FR4 material with 1-in2 (6.45-cm2) Cu.
(2) RθJC is determined with the device mounted on a 1-in2 (6.45-cm2), 2-oz (0.071-mm) thick Cu pad on a 1.5-in × 1.5-in
(3.81-cm × 3.81-cm), 0.06-in (1.52-mm) thick FR4 board. RθJC is specified by design while RθJA is determined by the user’s board design.

5.4 Power Block Performance

TA = 25° (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
PLOSS Power loss(1) VIN = 12 V VGS = 5 V, VOUT = 1.3 V,
IOUT = 25 A, ƒSW = 500 kHz,
LOUT = 0.3 µH, TJ = 25°C		 3 W
IQVIN VIN quiescent current TG to TGR = 0 V ,BG to PGND = 0 V 10 µA
(1) Measurement made with six 10-µF (TDK C3216X5R1C106KT or equivalent) ceramic capacitors placed across VIN to PGND pins and using a high-current 5-V driver IC.

5.5 Electrical Characteristics

TA = 25°C (unless otherwise stated)
PARAMETER TEST CONDITIONS Q1 CONTROL FET Q2 SYNC FET UNIT
MIN TYP MAX MIN TYP MAX
STATIC CHARACTERISTICS
BVDSS Drain-to-source voltage VGS = 0 V, IDS = 250 μA 30 30 V
IDSS Drain-to-source leakage current VGS = 0 V, VDS = 20 V 1 1 μA
IGSS Gate-to-source leakage current VDS = 0 V, VGS = +10 / –8 100 100 nA
VGS(th) Gate-to-source threshold voltage VDS = VGS, IDS = 250 μA 1 2.1 0.75 1.4 V
ZDS(on)(1) Effective AC on-impedance VIN = 12 V, VGS = 5 V,
VOUT = 1.3 V, IOUT = 20 A,
ƒSW = 500 kHz,
LOUT = 0.3 µH		 5 1.2 mΩ
gƒs Transconductance VDS = 15 V, IDS = 20 A 97 157 S
DYNAMIC CHARACTERISTICS
CISS Input capacitance VGS = 0 V, VDS = 15 V,
ƒ = 1 MHz		 1360 1770 2950 3835 pF
COSS Output capacitance 565 735 1300 1690 pF
CRSS Reverse transfer capacitance 19 25 50 65 pF
RG Series gate resistance 1.3 3 0.8 2 Ω
Qg Gate charge total (4.5 V) VDS = 15 V,
IDS = 20 A		 8.4 10.9 20 26 nC
Qgd Gate charge gate-to-drain 1.6 3.6 nC
Qgs Gate charge gate-to-source 2.6 4.3 nC
Qg(th) Gate charge at Vth 1.6 2.3 nC
QOSS Output charge VDS = 17 V, VGS = 0 V 9.7 28 nC
td(on) Turnon delay time VDS = 15 V, VGS = 4.5 V,
IDS = 20 A, RG = 2 Ω		 7 8 ns
tr Rise time 17 10 ns
td(off) Turnoff delay time 13 33 ns
tƒ Fall time 2.3 4.7 ns
DIODE CHARACTERISTICS
VSD Diode forward voltage IDS = 20 A, VGS = 0 V 0.85 1 0.77 1 V
Qrr Reverse recovery charge Vdd = 17 V, IF = 20 A,
di/dt = 300 A/μs		 12.5 32 nC
trr Reverse recovery time 22 28 ns
(1) Equivalent based on application testing. See Equivalent System Performance section for details.
CSD87350Q5D M0189-01_LPS293.gif
Max RθJA = 50°C/W when mounted on 1 in2 (6.45 cm2) of
2-oz (0.071-mm) thick Cu.
CSD87350Q5D M0190-01_LPS293.gif
Max RθJA = 102°C/W when mounted on minimum pad area of
2-oz (0.071-mm) thick Cu.

5.6 Typical Power Block Device Characteristics

TJ = 125°C, unless stated otherwise. The typical power block system characteristic curves Figure 3, Figure 4, and Figure 5 are based on measurements made on a PCB design with dimensions of 4 in (W) × 3.5 in (L) × 0.062 in (H) and 6 copper layers of 1-oz copper thickness. See Application and Implementation for detailed explanation.
CSD87350Q5D D002_SLPS288.gif
VIN = 12 V VGS = 5 V VOUT = 1.3 V
ƒSW = 500 kHz LOUT = 0.3 µH
Figure 1. Power Loss vs Output Current
CSD87350Q5D D004_SLPS288.gif
VIN = 12 V VGS = 5 V VOUT = 1.3 V
ƒSW = 500 kHz LOUT = 0.3 µH
Figure 3. Safe Operating Area (SOA) – PCB Vertical Mount
CSD87350Q5D D006_SLPS288.gif
VIN = 12 V VGS = 5 V VOUT = 1.3 V
ƒSW = 500 kHz LOUT = 0.3 µH
Figure 5. Typical Safe Operating Area (SOA)
CSD87350Q5D D008_SLPS288.gif
1.
VIN = 12 V VOUT = 1.3 V LOUT = 0.3 µH
ƒSW = 500 kHz IOUT = 40 A
Figure 7. Normalized Power Loss vs Input Voltage
CSD87350Q5D D010_SLPS288.gif
VIN = 12 V VGS = 5 V VOUT = 1.3 V
ƒSW = 500 kHz IOUT = 40 A
Figure 9. Normalized Power Loss vs Output Inductance
CSD87350Q5D D003_SLPS288.gif
VIN = 12 V VGS = 5 V VOUT = 1.3 V
ƒSW = 500 kHz LOUT = 0.3 µH
Figure 2. Normalized Power Loss vs Temperature
CSD87350Q5D D005_SLPS288.gif
VIN = 12 V VGS = 5 V VOUT = 1.3 V
ƒSW = 500 kHz LOUT = 0.3 µH
Figure 4. Safe Operating Area (SOA) – PCB Horizontal Mount
CSD87350Q5D D007_SLPS288.gif
VIN = 12 V VGS = 5 V VOUT = 1.3 V
LOUT = 0.3 µH IOUT = 40 A
Figure 6. Normalized Power Loss vs Switching Frequency
CSD87350Q5D D009_SLPS288.gif
VIN = 12 V VGS = 5 V ƒSW = 500 kHz
LOUT = 0.3 µH IOUT = 40 A
Figure 8. Normalized Power Loss vs Output Voltage

5.7 Typical Power Block MOSFET Characteristics

TA = 25°C, unless stated otherwise.
CSD87350Q5D D011_SLPS288.gif
Figure 10. Control MOSFET Saturation
CSD87350Q5D D013_SLPS288.gif
VDS = 5 V
Figure 12. Control MOSFET Transfer
CSD87350Q5D D015_SLPS288.gif
ID = 20 A VDD = 15 V
Figure 14. Control MOSFET Gate Charge
CSD87350Q5D D017_SLPS288.gif
ƒ = 1 MHz VGS = 0
Figure 16. Control MOSFET Capacitance
CSD87350Q5D D019_SLPS288.gif
ID = 250 µA
Figure 18. Control MOSFET VGS(th)
CSD87350Q5D D021_SLPS288.gif
Figure 20. Control MOSFET RDS(on) vs VGS
CSD87350Q5D D023_SLPS288.gif
ID = 20 A VGS = 8 V
Figure 22. Control MOSFET Normalized RDS(on)
CSD87350Q5D D025_SLPS288.gif
Figure 24. Control MOSFET Body Diode
CSD87350Q5D D027_SLPS288.gif
Figure 26. Control MOSFET Unclamped Inductive Switching
CSD87350Q5D D012_SLPS288.gif
Figure 11. Sync MOSFET Saturation
CSD87350Q5D D014_SLPS288.gif
VDS = 5 V
Figure 13. Sync MOSFET Transfer
CSD87350Q5D D016_SLPS288.gif
ID = 20 A VDD = 15 V
Figure 15. Sync MOSFET Gate Charge
CSD87350Q5D D018_SLPS288.gif
ƒ = 1 MHz VGS = 0
Figure 17. Sync MOSFET Capacitance
CSD87350Q5D D020_SLPS288.gif
ID = 250 µA
Figure 19. Sync MOSFET VGS(th)
CSD87350Q5D D022_SLPS288.gif
Figure 21. Sync MOSFET RDS(on) vs VGS
CSD87350Q5D D024_SLPS288.gif
ID = 20 A VGS = 8 V
Figure 23. Sync MOSFET Normalized RDS(on)
CSD87350Q5D D026_SLPS288.gif
Figure 25. Sync MOSFET Body Diode
CSD87350Q5D D028_SLPS288.gif
Figure 27. Sync MOSFET Unclamped Inductive Switching