SLVSJL5B August   2025  – June 2026 CC2755P20

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Functional Block Diagram
  6. 5 Device Comparison
  7. 6 Pin Configuration and Functions
    1. 6.1 Pin Diagrams
      1. 6.1.1 Pin Diagram—RHA package
    2. 6.2 Signal Descriptions
      1. 6.2.1 Signal Descriptions—RHA Package
    3. 6.3 Connections for Unused Pins and Modules
      1. 6.3.1 Connections for Unused Pins and Modules—RHA Package
    4. 6.4 Peripheral Pin Mapping
      1. 6.4.1 RHA Peripheral Pin Mapping
    5. 6.5 Peripheral Signal Descriptions
      1. 6.5.1 RHA Peripheral Signal Descriptions
  8. 7 Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD and MSL Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  DC/DC
    5. 7.5  GLDO
    6. 7.6  Power Supply and Modules
    7. 7.7  Battery Monitor
    8. 7.8  BATMON Temperature Sensor
    9. 7.9  Power Consumption—Power Modes
    10. 7.10 Power Consumption–Radio Modes (P variant)
    11. 7.11 Nonvolatile (Flash) Memory Characteristics
    12. 7.12 Thermal Resistance Characteristics
    13. 7.13 RF Frequency Bands
    14. 7.14 Bluetooth Low Energy—Receive (RX)
    15. 7.15 Bluetooth Low Energy—Transmit (TX)
    16. 7.16 Bluetooth Channel Sounding
    17. 7.17 Zigbee and Thread—IEEE 802.15.4-2006 2.4GHz (OQPSK DSSS1:8, 250kbps) - RX
    18. 7.18 Zigbee and Thread—IEEE 802.15.4-2006 2.4GHz (OQPSK DSSS1:8, 250kbps) - TX
    19. 7.19 2.4GHz RX/TX CW
    20. 7.20 Timing and Switching Characteristics
      1. 7.20.1 Reset Timing
      2. 7.20.2 Wakeup Timing
      3. 7.20.3 Clock Specifications
        1. 7.20.3.1 48MHz Crystal Oscillator (HFXT)
        2. 7.20.3.2 96MHz RC Oscillator (HFOSC)
        3. 7.20.3.3 80/90/98MHz RC Oscillator (AFOSC)
        4. 7.20.3.4 32kHz Crystal Oscillator (LFXT)
        5. 7.20.3.5 32kHz RC Oscillator (LFOSC)
    21. 7.21 Peripheral Characteristics
      1. 7.21.1 UART
        1. 7.21.1.1 UART Characteristics
      2. 7.21.2 SPI
        1. 7.21.2.1 SPI Characteristics
        2. 7.21.2.2 SPI Controller Mode
        3. 7.21.2.3 SPI Timing Diagrams—Controller Mode
        4. 7.21.2.4 SPI Peripheral Mode
        5. 7.21.2.5 SPI Timing Diagrams—Peripheral Mode
      3. 7.21.3 I2C
        1. 7.21.3.1 I2C Characteristics
        2. 7.21.3.2 I2C Timing Diagram
      4. 7.21.4 I2S
        1. 7.21.4.1 I2S Controller Mode
        2. 7.21.4.2 I2S Peripheral Mode
      5. 7.21.5 GPIO
        1. 7.21.5.1 GPIO DC Characteristics
      6. 7.21.6 ADC
        1. 7.21.6.1 Analog-to-Digital Converter (ADC) Characteristics
      7. 7.21.7 Comparators
        1. 7.21.7.1 Low Power Comparator
      8. 7.21.8 Voltage Glitch Monitor
    22. 7.22 Typical Characteristics
      1. 7.22.1 MCU Current
      2. 7.22.2 RX Current
      3. 7.22.3 TX Current
      4. 7.22.4 RX Performance
      5. 7.22.5 TX Performance
      6. 7.22.6 ADC Performance
  9. 8 Detailed Description
    1. 8.1  Overview
    2. 8.2  System CPU
    3. 8.3  Radio (RF Core)
      1. 8.3.1 Bluetooth Low Energy
      2. 8.3.2 802.15.4 (Thread, Zigbee, Matter)
    4. 8.4  Memory
    5. 8.5  Hardware Security Module (HSM)
    6. 8.6  Cryptography
    7. 8.7  Timers
    8. 8.8  Algorithm Processing Unit (APU)
    9. 8.9  Serial Peripherals and I/O
    10. 8.10 Battery and Temperature Monitor
    11. 8.11 Voltage Glitch Monitor (VGM)
    12. 8.12 µDMA
    13. 8.13 Debug
    14. 8.14 Power Management
    15. 8.15 Clock Systems
    16. 8.16 Network Processor
    17. 8.17 Integrated BALUN, High Power PA (Power Amplifier)
  10. 9 Application, Implementation, and Layout
    1. 9.1 Reference Designs
    2. 9.2 Junction Temperature Calculation
  11. 10Device and Documentation Support
    1. 10.1 Device Nomenclature
    2. 10.2 Tools and Software
      1. 10.2.1 SimpleLink™ Microcontroller Platform
      2. 10.2.2 Software License and Notice
    3. 10.3 Documentation Support
    4. 10.4 Support Resources
    5. 10.5 Trademarks
    6. 10.6 Electrostatic Discharge Caution
    7. 10.7 Glossary
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information

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8.6 Cryptography

The CC27xx devices also integrate LAES, an AES-128 cryptography hardware accelerator (outside the HSM), to support latency-critical link-layer encryption/decryption operations prescribed by the wireless protocols. It also has the benefit of being lower power and improves the availability and responsiveness of the system because the cryptography operations run in a background hardware thread. The AES hardware accelerator supports the following block cipher modes and message authentication codes:

  • AES ECB encrypt-only
  • AES CBC encrypt-only
  • AES CTR encrypt/decrypt
  • AES CBC-MAC
  • AEC CCM (uses a combination of CTR + CBC-MAC hardware via software drivers)
Software implementation of AES GCM cipher mode using LAES for low-level cryptographic operations is supported. The AES hardware accelerator can be fed with plaintext/ciphertext from either the CPU or using DMA. Sustained throughput of one 16-byte ECB block per 23 cycles is possible, corresponding to > 30Mbps.