ZHCSG48C April   2015  – March 2017

PRODUCTION DATA.  

  1. 特性
  2. 应用
  3. 说明
  4. 修订历史记录
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Device Power Up
        1. 7.3.1.1 Battery Only
        2. 7.3.1.2 Adapter Detect and ACOK Output
          1. 7.3.1.2.1 Adapter Overvoltage (ACOVP)
      2. 7.3.2 System Power Selection
      3. 7.3.3 Enable and Disable Charging
        1. 7.3.3.1 Automatic Internal Soft-Start Charger Current
      4. 7.3.4 Current and Power Monitor
        1. 7.3.4.1 High Accuracy Current Sense Amplifier (IADP and IDCHG)
        2. 7.3.4.2 High Accuracy Power Sense Amplifier (PMON)
      5. 7.3.5 Processor Hot Indication for CPU Throttling
      6. 7.3.6 Converter Operation
        1. 7.3.6.1 Continuous Conduction Mode (CCM)
        2. 7.3.6.2 Discontinuous Conduction Mode (DCM)
        3. 7.3.6.3 Non-Sync Mode and Light Load Comparator
        4. 7.3.6.4 EMI Switching Frequency Adjust
      7. 7.3.7 Battery LEARN Cycle
      8. 7.3.8 Charger Timeout
      9. 7.3.9 Device Protections Features
        1. 7.3.9.1 Input Overcurrent Protection (ACOC)
        2. 7.3.9.2 Charge Overcurrent Protection (CHGOCP)
        3. 7.3.9.3 Battery Overvoltage Protection (BATOVP)
        4. 7.3.9.4 Battery Short
        5. 7.3.9.5 Thermal Shutdown Protection (TSHUT)
        6. 7.3.9.6 Inductor Short, MOSFET Short Protection
    4. 7.4 Device Functional Modes
      1. 7.4.1 Battery Charging
      2. 7.4.2 Hybrid Power Boost Mode
        1. 7.4.2.1 Battery Discharge Current Regulation in Hybrid Power Boost Mode
    5. 7.5 Programming
      1. 7.5.1 SMBus Interface
        1. 7.5.1.1 SMBus Write-Word and Read-Word Protocols
        2. 7.5.1.2 Timing Diagrams
    6. 7.6 Register Maps
      1. 7.6.1  Battery-Charger Commands
      2. 7.6.2  Setting Charger Options
        1. 7.6.2.1 ChargeOption0 Register
      3. 7.6.3  ChargeOption1 Register
      4. 7.6.4  ChargeOption2 Register
      5. 7.6.5  ChargeOption3 Register
      6. 7.6.6  ProchotOption0 Register
      7. 7.6.7  ProchotOption1 Register
      8. 7.6.8  ProchotStatus Register
      9. 7.6.9  Setting the Charge Current
      10. 7.6.10 Setting the Charge Voltage
      11. 7.6.11 Setting Input Current
      12. 7.6.12 Setting the Discharge Current
  8. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Negative Output Voltage Protection
        2. 8.2.2.2 Reverse Input Voltage Protection
        3. 8.2.2.3 Reduce Battery Quiescent Current
        4. 8.2.2.4 Inductor Selection
        5. 8.2.2.5 Input Capacitor
        6. 8.2.2.6 Output Capacitor
        7. 8.2.2.7 Power MOSFETs Selection
        8. 8.2.2.8 Input Filter Design
      3. 8.2.3 Application Curves
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Examples
      1. 10.2.1 Layout Consideration of Current Path
      2. 10.2.2 Layout Consideration of Short Circuit Protection
      3. 10.2.3 Layout Consideration for Short Circuit Protection
  11. 11器件和文档支持
    1. 11.1 接收文档更新通知
    2. 11.2 社区资源
    3. 11.3 商标
    4. 11.4 静电放电警告
    5. 11.5 Glossary
  12. 12机械、封装和可订购信息

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

Application and Implementation

NOTE

Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality.

Application Information

The bq24780SEVM-583 evaluation module (EVM) is a complete charger module for evaluating the bq24780S. The application curves were taken using the bq24780SEVM-583. Refer to the EVM user's guide (SLUUBA6) for EVM information.

Typical Applications

bq24780S app_circuit_slusc27.gif Figure 16. Typical System Schematic With Two NMOS Selectors

Design Requirements

DESIGN PARAMETER EXAMPLE VALUE
Input Voltage(2) 17.7V < Adapter Voltage < 24V
Input Current Limit (2) 3.2A for 65W adapter
Battery Charge Voltage(1) 12592mV for 3s battery
Battery Charge Current(1) 4096mA for 3s battery
Battery Discharge Current(1) 6144mA for 3s battery
Refer to battery specification for settings.
Refer to adapter specification for settings for Input Voltage and Input Current Limit.

Detailed Design Procedure

The parameters are configurable using the evaluation software.

The simplified application circuit (see Figure 16) shows the minimum capacitance requirements for each pin. Inductor, capacitor, and MOSFET selection are explained in the rest of this section. Refer to the EVM user's guide (SLUUBA6) for the full application schematic.

Negative Output Voltage Protection

Reversely insert the battery pack into the charger output during production or hard shorts on battery to ground will generate negative output voltage on SRP, SRN, and BATSRC pins. IC internal electrostatic-discharge (ESD) diodes from GND pin to SRP or SRN pins and two anti-parallel (AP) diodes between SRP and SRN pins can be forward biased and negative current can pass through the ESD diodes and AP diodes when output has negative voltage. Small resistors for SRP, SRN and BATSRC (R12-R14) further limits the negative current into these pins. Suggest resistor value is 10 Ω for SRP, SRN, and BATSRC pins.

Reverse Input Voltage Protection

Q6, R12, and R13 in Figure 17 give system and IC protection from reversed adapter voltage. In normal operation, Q6 is turned off by negative Vgs. When adapter voltage is reversed, Q6 Vgs is positive. As a result, Q6 turns on to short gate and source of Q2 so that Q2 is off. Q2 body diode blocks negative voltage to system. However, CMSRC and ACDRV pins need R3 and R4 to limit the current due to the ESD diode of these pins when turned on. Q6 must has low Vgs threshold voltage and low Qgs gate charge so it turns on before Q2 turns on. R3 and R4 must have enough power rating for the power dissipation when the ESD diode is on. If Q1 is replaced by Schottky diode for reverse adapter voltage protection, no extra small MOSFET and resistors are needed.

bq24780S rev_in_V_pro2_lusb27.gif Figure 17. Reverse Input Voltage Protection Circuit

Reduce Battery Quiescent Current

When the adapter is not present, if VCC is powered with voltage higher than UVLO directly or indirectly (such as through a LDO or switching converter) from battery, the internal BATFET charge pump gives the BATFET pin 6-V higher voltage than the SRN pin to drive the n-channel BATFET. As a result, the battery has higher quiescent current. This is only necessary when the battery powers the system due to a high system current that goes through the MOSFET channel instead of the body diode to reduce conduction loss and extend the battery working life. When the system is totally shutdown, it is not necessary to let the internal BATFET charge pump work. The host controller can turn off the switches in the battery pack to disconnect the battery from the system. Some packs may wake up again if the voltage on SRN pin stays above pack UVLO too long. By setting ChargeOption0() bit[1] to 1, host can enable current source inside charger IC to discharge the SRN pin quickly. As a result, the system is discharged down to zero to minimize the quiescent current.

Inductor Selection

The bq24780S has three selectable fixed switching frequency. Higher switching frequency allows the use of smaller inductor and capacitor values. Inductor saturation current should be higher than the charging current (ICHG) plus half the ripple current (IRIPPLE):

Equation 6. bq24780S eq4_lusa79.gif

The inductor ripple current depends on input voltage (VIN), duty cycle (D = VOUT/VIN), switching frequency (fS) and inductance (L):

Equation 7. bq24780S eq5_lusa79.gif

The maximum inductor ripple current happens with D = 0.5 or close to 0.5. For example, the battery charging voltage range is from 9V to 12.6V for 3-cell battery pack. For 20V adapter voltage, 10V battery voltage gives the maximum inductor ripple current. Another example is 4-cell battery, the battery voltage range is from 12V to 16.8V, and 12V battery voltage gives the maximum inductor ripple current.

Usually inductor ripple is designed in the range of (20-40%) maximum charging current as a trade-off between inductor size and efficiency for a practical design.

The bq24780S has charge under current protection (UCP) by monitoring charging current sensing resistor cycle-by-cycle. The typical cycle-by-cycle UCP threshold is 5mV falling edge corresponding to 0.5A falling edge for a 10mΩ charging current sensing resistor. When the average charging current is less than 125mA for a 10mΩ charging current sensing resistor, the low side MOSFET is off until BTST capacitor voltage needs to refresh the charge. As a result, the converter relies on low side MOSFET body diode for the inductor freewheeling current.

Input Capacitor

Input capacitor should have enough ripple current rating to absorb input switching ripple current. The worst case RMS ripple current is half of the charging current when duty cycle is 0.5. If the converter does not operate at 50% duty cycle, then the worst case capacitor RMS current occurs where the duty cycle is closest to 50% and can be estimated by Equation 8:

Equation 8. bq24780S eq6_lusa79.gif

Low ESR ceramic capacitor such as X7R or X5R is preferred for input decoupling capacitor and should be placed to the drain of the high side MOSFET and source of the low side MOSFET as close as possible. Voltage rating of the capacitor must be higher than normal input voltage level. 25V rating or higher capacitor is preferred for 19-20V input voltage. 10-20μF capacitance is suggested for typical of 3-4A charging current.

Ceramic capacitors show a dc-bias effect. This effect reduces the effective capacitance when a dc-bias voltage is applied across a ceramic capacitor, as on the input capacitor of a charger. The effect may lead to a significant capacitance drop, especially for high input voltages and small capacitor packages. See the manufacturer's data sheet about the performance with a dc bias voltage applied. It may be necessary to choose a higher voltage rating or nominal capacitance value in order to get the required value at the operating point.

Output Capacitor

Output capacitor also should have enough ripple current rating to absorb output switching ripple current. The output capacitor RMS current is given:

Equation 9. bq24780S eq7_lusa79.gif

The bq24780S has internal loop compensator. To get good loop stability, the resonant frequency of the output inductor and output capacitor should be designed between 10 kHz and 20 kHz. The preferred ceramic capacitor is 25V X7R or X5R for output capacitor. 10-20μF capacitance is suggested for a typical of 3-4A charging current. Place the capacitors after charging current sensing resistor to get the best charge current regulation accuracy.

Ceramic capacitors show a dc-bias effect. This effect reduces the effective capacitance when a dc-bias voltage is applied across a ceramic capacitor, as on the output capacitor of a charger. The effect may lead to a significant capacitance drop, especially for high output voltages and small capacitor packages. See the manufacturer's data sheet about the performance with a dc bias voltage applied. It may be necessary to choose a higher voltage rating or nominal capacitance value in order to get the required value at the operating point.

Power MOSFETs Selection

Two external N-channel MOSFETs are used for a synchronous switching battery charger. The gate drivers are internally integrated into the IC with 6V of gate drive voltage. 30V or higher voltage rating MOSFETs are preferred for 19-20V input voltage.

Figure-of-merit (FOM) is usually used for selecting proper MOSFET based on a tradeoff between the conduction loss and switching loss. For the top side MOSFET, FOM is defined as the product of a MOSFET's on-resistance, RDS(ON), and the gate-to-drain charge, QGD. For the bottom side MOSFET, FOM is defined as the product of the MOSFET's on-resistance, RDS(ON), and the total gate charge, QG.

Equation 10. FOMtop = RDS(on) x QGD; FOMbottom = RDS(on) x QG

The lower the FOM value, the lower the total power loss. Usually lower RDS(ON) has higher cost with the same package size.

The top-side MOSFET loss includes conduction loss and switching loss. It is a function of duty cycle (D=VOUT/VIN), charging current (ICHG), MOSFET's on-resistance (RDS(ON)), input voltage (VIN), switching frequency (fS), turn on time (ton) and turn off time (toff):

Equation 11. bq24780S eq9_lusa79.gif

The first item represents the conduction loss. Usually MOSFET RDS(ON) increases by 50% with 100°C junction temperature rise. The second term represents the switching loss. The MOSFET turn-on and turn-off times are given by:

Equation 12. bq24780S eq10_lusa79.gif

where Qsw is the switching charge, Ion is the turn-on gate driving current and Ioff is the turn-off gate driving current. If the switching charge is not given in MOSFET datasheet, it can be estimated by gate-to-drain charge (QGD) and gate-to-source charge (QGS):

Equation 13. bq24780S eq11_lusa79.gif

Gate driving current can be estimated by REGN voltage (VREGN), MOSFET plateau voltage (Vplt), total turn-on gate resistance (Ron) and turn-off gate resistance (Roff) of the gate driver:

Equation 14. bq24780S eq12_lusa79.gif

The conduction loss of the bottom-side MOSFET is calculated with the following equation when it operates in synchronous continuous conduction mode:

Equation 15. Pbottom = (1 - D) x ICHG 2 x RDS(on)

When charger operates in non-synchronous mode, the bottom-side MOSFET is off. As a result all the freewheeling current goes through the body-diode of the bottom-side MOSFET. The body diode power loss depends on its forward voltage drop (VF), non-synchronous mode charging current (INONSYNC), and duty cycle (D).

Equation 16. PD = VF x INONSYNC x (1 - D)

The maximum charging current in non-synchronous mode can be up to 0.25A for a 10mΩ charging current sensing resistor or 0.5A if battery voltage is below 2.5V. The minimum duty cycle happens at lowest battery voltage. Choose the bottom-side MOSFET with either an internal Schottky or body diode capable of carrying the maximum non-synchronous mode charging current.

Input Filter Design

During adapter hot plug-in, the parasitic inductance and input capacitor from the adapter cable form a second order system. The voltage spike at VCC pin maybe beyond IC maximum voltage rating and damage IC. The input filter must be carefully designed and tested to prevent over voltage event on VCC pin.

There are several methods to damping or limit the over voltage spike during adapter hot plug-in. An electrolytic capacitor with high ESR as an input capacitor can damp the over voltage spike well below the IC maximum pin voltage rating. A high current capability TVS Zener diode can also limit the over voltage level to an IC safe level. However these two solutions may not have low cost or small size.

A cost effective and small size solution is shown in Figure 18. The R1 and C1 are composed of a damping RC network to damp the hot plug-in oscillation. As a result the over voltage spike is limited to a safe level. D1 is used for reverse voltage protection for VCC pin. C2 is VCC pin decoupling capacitor and it should be place to VCC pin as close as possible. C2 value should be less than C1 value so R1 can dominant the equivalent ESR value to get enough damping effect. R2 is used to limit inrush current of D1 to prevent D1 getting damage when adapter hot plug-in. R2 and C2 should have 10us time constant to limit the dv/dt on VCC pin to reduce inrush current when adapter hot plug in. R1 has high inrush current. R1 package must be sized enough to handle inrush current power loss according to resistor manufacturer’s data sheet. The filter components value always need to be verified with real application and minor adjustments may need to fit in the real application circuit.

bq24780S input_flt_lusbw0.gif Figure 18. Input Filter

Application Curves

bq24780S app_001_slusc27.gif
No Battery
Figure 19. VCC, ACDET, REGN, and ACOK During Power Up
bq24780S app_003_slusc27.gif
Figure 21. Charge Enable With Soft Start
bq24780S app_005_slusc27.gif
Figure 23. Hybrid Power Boost Mode Enabled
bq24780S app_007_slusc27.gif
Figure 25. Converter in Continuous Conduction Mode (CCM) During Charging
bq24780S app_009_slusc27.gif
Figure 27. Converter in Continuous Conduction Mode During Hybrid Power Boost Mode
bq24780S app_011_slusc27.gif
VIN = 19.5 V IDPM = 3072 mA VBAT = 11 V
ICHG = 2048 mA
Figure 29. Input Current Regulation During System Load Transient
bq24780S app_013_slusc27.gif
VIN = 19.5 V IDPM = 2048 mA ICHG = 2048 mA
VBAT = 11 V ICRIT 120% x IDPM
PROCHOT pulsewidth 0x3C[4:3] = 11
Figure 31. Hybrid Power Boost Mode with Charge Enable, PROCHOT Asserted
bq24780S app_002_slusc27.gif
VBAT = 11 V
Figure 20. Power On ACOK Delay at 1st and 2nd Adapter Plug-in
bq24780S app_004_slusc27.gif
Figure 22. Charge Disabled by ILIM
bq24780S app_006_slusc27.gif
Figure 24. Hybrid Power Boost Mode Doisabled by ILIM
bq24780S app_008_slusc27.gif
Figure 26. Converter in Discontinuous Conduction Mode (DCM) During Charging
bq24780S app_010_slusc27.gif
IDPM 4096 mA ICHG 2432 mA VBAT 11 V
Figure 28. Converter in Discontinuous Conduction Mode During Hybrid Power Boost Mode
bq24780S app_012_slusc27.gif
VIN = 19.5 V IDPM = 2048 mA VBAT 11 V
Figure 30. Hybrid Power Boost Mode With Charge Enable
bq24780S app_014_slusc27.gif
VIN = 19.5 V IDPM = 2560 mA VBAT = 11 V
ICHG = 2 A IDCHG = 2048 mA
Figure 32. Hybrid Power Boost Mode With Discharge Current Regulation