ZHCSDW2 July   2015 ADS8694 , ADS8698

PRODUCTION DATA.  

  1. 特性
  2. 应用
  3. 说明
  4. 修订历史记录
  5. Device Comparison Table
  6. Pin Configuration and Functions
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Timing Requirements: Serial Interface
    7. 7.7 Typical Characteristics
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  Analog Inputs
      2. 8.3.2  Analog Input Impedance
      3. 8.3.3  Input Overvoltage Protection Circuit
      4. 8.3.4  Programmable Gain Amplifier (PGA)
      5. 8.3.5  Second-Order, Low-Pass Filter (LPF)
      6. 8.3.6  ADC Driver
      7. 8.3.7  Multiplexer (MUX)
      8. 8.3.8  Reference
        1. 8.3.8.1 Internal Reference
        2. 8.3.8.2 External Reference
      9. 8.3.9  Auxiliary Channel
        1. 8.3.9.1 Input Driver for the AUX Channel
      10. 8.3.10 ADC Transfer Function
      11. 8.3.11 Alarm Feature
    4. 8.4 Device Functional Modes
      1. 8.4.1 Device Interface
        1. 8.4.1.1 Digital Pin Description
          1. 8.4.1.1.1 CS (Input)
          2. 8.4.1.1.2 SCLK (Input)
          3. 8.4.1.1.3 SDI (Input)
          4. 8.4.1.1.4 SDO (Output)
          5. 8.4.1.1.5 DAISY (Input)
          6. 8.4.1.1.6 RST/PD (Input)
        2. 8.4.1.2 Data Acquisition Example
        3. 8.4.1.3 Host-to-Device Connection Topologies
          1. 8.4.1.3.1 Daisy-Chain Topology
          2. 8.4.1.3.2 Star Topology
      2. 8.4.2 Device Modes
        1. 8.4.2.1 Continued Operation in the Selected Mode (NO_OP)
        2. 8.4.2.2 Frame Abort Condition (FRAME_ABORT)
        3. 8.4.2.3 STANDBY Mode (STDBY)
        4. 8.4.2.4 Power-Down Mode (PWR_DN)
        5. 8.4.2.5 Auto Channel Enable with Reset (AUTO_RST)
        6. 8.4.2.6 Manual Channel n Select (MAN_Ch_n)
        7. 8.4.2.7 Channel Sequencing Modes
        8. 8.4.2.8 Reset Program Registers (RST)
    5. 8.5 Register Maps
      1. 8.5.1 Command Register Description
      2. 8.5.2 Program Register Description
        1. 8.5.2.1 Program Register Read/Write Operation
        2. 8.5.2.2 Program Register Map
        3. 8.5.2.3 Program Register Descriptions
          1. 8.5.2.3.1 Auto-Scan Sequencing Control Registers
            1. 8.5.2.3.1.1 Auto-Scan Sequence Enable Register (address = 01h)
            2. 8.5.2.3.1.2 Channel Power Down Register (address = 02h)
          2. 8.5.2.3.2 Device Features Selection Control Register (address = 03h)
          3. 8.5.2.3.3 Range Select Registers (addresses 05h-0Ch)
          4. 8.5.2.3.4 Alarm Flag Registers (Read-Only)
            1. 8.5.2.3.4.1 ALARM Overview Tripped-Flag Register (address = 10h)
            2. 8.5.2.3.4.2 Alarm Flag Registers: Tripped and Active (address = 11h to 14h)
          5. 8.5.2.3.5 Alarm Threshold Setting Registers
          6. 8.5.2.3.6 Command Read-Back Register (address = 3Fh)
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Applications
      1. 9.2.1 Phase-Compensated, 8-Channel, Multiplexed Data Acquisition System for Power Automation
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
      2. 9.2.2 18-Bit, 8-Channel, Integrated Analog Input Module for Programmable Logic Controllers (PLCs)
        1. 9.2.2.1 Design Requirements
        2. 9.2.2.2 Detailed Design Procedure
  10. 10Power-Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12器件和文档支持
    1. 12.1 文档支持
      1. 12.1.1 相关文档 
    2. 12.2 相关链接
    3. 12.3 社区资源
    4. 12.4 商标
    5. 12.5 静电放电警告
    6. 12.6 Glossary
  13. 13机械、封装和可订购信息

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

9 Application and Implementation

NOTE

Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality.

9.1 Application Information

The ADS8694 and ADS8698 devices are fully-integrated data acquisition systems based on a 18-bit SAR ADC. The devices include an integrated analog front-end for each input channel and an integrated precision reference with a buffer. As such, this device family does not require any additional external circuits for driving the reference or analog input pins of the ADC.

9.2 Typical Applications

9.2.1 Phase-Compensated, 8-Channel, Multiplexed Data Acquisition System for Power Automation

ADS8694 ADS8698 apps_power_tipd_sbas686.gifFigure 108. 8-Channel, Multiplexed Data Acquisition System for Power Automation

9.2.1.1 Design Requirements

In modern power grids, accurately measuring the electrical parameters of the various areas of the power grid is extremely critical. This measurement helps determine the operating status and running quality of the grid. Such accurate measurements also help diagnose potential problems with the power network so that these problems can be resolved quickly without having any significant service disruption. The key electrical parameters include amplitude, frequency, and phase, which are important for calculating the power factor, power quality, and other parameters of the power system.

The phase angle of the electrical signal on the power network buses is a special interest to power system engineers. The primary objective for this design is to accurately measure the phase and phase difference between the analog input signals in a multichannel data acquisition system. When multiple input channels are sampled in a sequential manner as in a multiplexed ADC, an additional phase delay is introduced between the channels. Thus, the phase measurements are not accurate. However, this additional phase delay is constant and can be compensated in application software.

The key design requirements are given below:

  • Single-ended sinusoidal input signal with a ±10-V amplitude and typical frequency (fIN = 50 Hz).
  • Design an 8-channel multiplexed data acquisition system using a 18-bit SAR ADC.
  • Design a software algorithm to compensate for the additional phase difference between the channels.

9.2.1.2 Detailed Design Procedure

The application circuit and system diagram for this design is shown in Figure 108. This design includes a complete hardware and software implementation of a multichannel data acquisition system for power automation applications.

This system can be designed using the ADS8698, which is a 18-bit, 500-kSPS, 8-channel, multiplexed input, SAR ADC with integrated precision reference and analog front-end circuitry for each channel. The ADC supports bipolar input ranges up to ±10.24 V with a single 5-V supply and provides minimum latency in data output resulting from the SAR architecture. The integration offered by this device makes the ADS8694 and ADS8698 an ideal selection for such applications, because the integrated signal conditioning helps minimize system components and avoids the need for generating high-voltage supply rails. The overall system-level dc precision (gain and offset errors) and low temperature drift offered by this device helps system designers achieve the desired system accuracy without calibration. In most applications, using passive RC filters or multi-stage filters in front of the ADC is preferred to reduce the noise of the input signal.

The software algorithm implemented in this design uses the discrete fourier transform (DFT) method to calculate and track the input signal frequency, obtain the exact phase angle of the individual signal, calculate the phase difference, and implement phase compensation. The entire algorithm has four steps:

  • Calculate the theoretical phase difference introduced by the ADC resulting from multiplexing input channels.
  • Estimate the frequency of the input signal using frequency tracking and DFT techniques.
  • Calculate the phase angle of all signals in the system based on the estimated frequency.
  • Compensate the phase difference for all channels using the theoretical value of an additional MUX phase delay calculated in the first step.
ADS8694 ADS8698 apps_tipd_logo_bas557.gif For a step-by-step design procedure, circuit schematics, bill of materials, PCB files, simulation results, and test results, see Phase Compensated 8-Channel, Multiplexed Data Acquisition System for Power Automation Reference Design (TIDU427).

9.2.2 18-Bit, 8-Channel, Integrated Analog Input Module for Programmable Logic Controllers (PLCs)

ADS8694 ADS8698 apps_plc_tipd_sbas686.gifFigure 109. 18-Bit, 8-Channel, Integrated Analog Input Module for PLCs

9.2.2.1 Design Requirements

This reference design provides a complete solution for a single-supply industrial control analog input module. The design is suitable for process control end equipment, such as programmable logic controllers (PLCs), distributed control systems (DCSs), and data acquisition systems (DAS) modules that must digitize standard industrial current inputs, and bipolar or unipolar input voltage ranges up to ±10 V. In an industrial environment, the analog voltage and current ranges typically include ±2.5 V, ±5 V, ±10 V, 0 V to 5 V, 0 V to 10 V, 4 mA to
20 mA, and 0 mA to 20 mA. This reference design can measure all standard industrial voltage and current inputs. Eight channels are provided on the module, and each channel can be configured as a current or voltage input with software configuration.

The key design requirements are given below:

  • Up to eight channels of user-programmable inputs:
    • Voltage inputs (with a typical ZIN of 1 MΩ): ±10 V, ±5 V, ±2.5 V, 0 V to 10 V, and 0 V to 5 V.
    • Current inputs (with a ZIN of 300 Ω): 0 mA to 20 mA, 4 mA to 20 mA, and ±20 mA.
  • A 18-bit SAR ADC with SPI.
  • Accuracy of ≤ 0.2% at 25°C over the entire input range of voltage and current inputs.
  • Onboard isolated Fly-Buck™ power supply with inrush current protection.
  • Slim-form factor 96 mm × 50.8 mm × 10 mm (L × W × H).
  • LabView-based GUI for signal-chain analysis and functional testing.
  • Designed to comply with IEC61000-4 standards for ESD, EFT, and surge.

9.2.2.2 Detailed Design Procedure

The application circuit and system diagram for this design is shown in Figure 109.

The module has eight analog input channels, and each channel can be configured as a current or voltage input with software configuration. This design can be implemented using the ADS8698, 18-bit, 8-channel, single-supply SAR ADC with an on-chip PGA and reference. The on-chip PGA provides a high-input impedance (typically 1 MΩ) and filters noise interference. The on-chip, 4.096-V, ultra-low drift voltage reference is used as the reference for the ADC core.

Digital isolation is achieved using an ISO7141CC and ISO1541D. The host microcontroller communicates with a TCA6408A (an 8-bit, I2C, I/O expander over an I2C bus). The ISO1541D is a bidirectional, I2C isolator that isolates the I2C lines for the TCA6408A. The TCA6408A controls the low RON opto-switch (TLP3123) that is used to switch between voltage-to-current input modes. The input channel configuration is done in microcontroller firmware.

A low-cost, constant, on-time, synchronous buck regulator in fly-buck configuration with an external transformer (LM5017) generates the isolated power supply. The LM5017 has a wide input supply range, making this device ideal for accepting a 24-V industrial supply. This transformer can accept up to 100 V, thereby making reliable transient protection of the input supply more easily achievable. The fly-buck power supply isolates and steps the input voltage down to 6 V. The supply then provides that voltage to the TPS70950 (the low dropout regulator) to generate 5 V to power the ADS8698 and other circuitry. The LM5017 also features a number of other safety and reliability functions, such as undervoltage lockout (UVLO), thermal shutdown, and peak current limit protection.

Input analog signals are protected against high-voltage, fast-transient events often expected in an industrial environment. The protection circuitry makes use of the transient voltage suppressor (TVS) and ESD diodes. The RC low-pass mode filters are used on each analog input before the input reaches the ADS8698, thus eliminating any high-frequency noise pickups and minimizing aliasing.

ADS8694 ADS8698 apps_tipd_logo_bas557.gif For a step-by-step design procedure, circuit schematics, bill of materials, PCB files, simulation results, and test results, see 16-Bit, 8-Channel, Integrated Analog Input Module for Programmable Logic Controllers (PLCs) (TIDU365).