SBAS404D October   2006  – February 2016 ADS8556 , ADS8557 , ADS8558

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Electrical Characteristics: General
    6. 6.6  Electrical Characteristics: ADS8556
    7. 6.7  Electrical Characteristics: ADS8557
    8. 6.8  Electrical Characteristics: ADS8558
    9. 6.9  Power Dissipation Characteristics
    10. 6.10 Serial Interface Timing Requirements
    11. 6.11 Parallel Interface Timing Requirements (Read Access)
    12. 6.12 Parallel Interface Timing Requirements (Write Access)
    13. 6.13 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Analog
        1. 7.3.1.1 Analog Inputs
        2. 7.3.1.2 Analog-to-Digital Converter (ADC)
        3. 7.3.1.3 Conversion Clock
        4. 7.3.1.4 CONVST_x
        5. 7.3.1.5 BUSY/INT
        6. 7.3.1.6 Reference
      2. 7.3.2 Digital
        1. 7.3.2.1 Device Configuration
        2. 7.3.2.2 Parallel Interface
        3. 7.3.2.3 Serial Interface
        4. 7.3.2.4 Output Data Format
    4. 7.4 Device Functional Modes
      1. 7.4.1 Hardware Mode
      2. 7.4.2 Software Mode
      3. 7.4.3 Daisy-Chain Mode (in Serial Mode Only)
      4. 7.4.4 Sequential Mode (in Software Mode with External Conversion Clock Only)
      5. 7.4.5 Reset and Power-Down Modes
    5. 7.5 Register Maps
      1. 7.5.1 Control Register (CR); Default Value = 0x000003FF
  8. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curve
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Related Links
    3. 11.3 Community Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

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8 Application and Implementation

NOTE

Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality.

8.1 Application Information

The ADS855x devices enable high-precision measurement of up to six analog signals simultaneously. The following sections summarize some of the typical use cases for the ADS855x devices and the main steps and components used around the analog-to-digital converter. The design example is carried out specifically using the ADS8556 for a 16-bit data acquisition system.

8.2 Typical Application

This section describes the measurement of electrical variables in a 3-phase power system. The accurate measurement of electrical variables in a power grid is extremely critical because this measurement helps determine the operating status and running quality of the grid. Such accurate measurements also help diagnose problems with the power network, thereby enabling prompt solutions and minimizing down time. The key electrical variables measured in 3-phase power systems are the three line voltages and the three line currents; see Figure 43. These variables enable metrology and power automation systems to determine the amplitude, frequency, and phase information to perform harmonic analysis, power factor calculation, power quality assessment, and so forth.

ADS8556 ADS8557 ADS8558 ADS8556_APPLIC_DIAG.gif Figure 43. Simultaneous Acquisition of Voltage and Current in a 3-Phase Power System

8.2.1 Design Requirements

To begin the design process, a few parameters must be decided upon. The designer must know the following:

  • Output range of the potential transformers (elements labeled PT1, PT2, and PT3 in Figure 43)
  • Output range of the current transformers (elements labeled CT1, CT2, and CT3 in Figure 43)
  • Input impedance required from the analog front-end for each channel
  • Fundamental frequency of the power system
  • Number of harmonics that must be acquired
  • Type of signal conditioning required from the analog front end for each channel

8.2.2 Detailed Design Procedure

Figure 44 shows the topology chosen to meet the design requirements. A feedback capacitor CF is included to provide a low-pass filter characteristic and attenuate signals outside the band of interest.

ADS8556 ADS8557 ADS8558 ADS8556_OP_AMP_INV.gif Figure 44. Operational Amplifier in an Inverting Configuration

The potential transformers (PTs) and current transformers (CTs) used in the system depicted in Figure 43 provide the six input variables required. These transformers have a ±10-V output range. Although the PTs and CTs provide isolation from the power system, the value of RIN is selected as 100 kΩ to provide an additional, high-impedance safety element to the input of the ADC. Moreover, selecting a low-frequency gain of –1 V/V (as shown in Equation 5) provides a ±10-V output that can be fed into the ADS8556 device; therefore, the value of RF is selected as 100 kΩ.

Equation 5. ADS8556 ADS8557 ADS8558 ADS8555_OP_AMP_G_eq.gif

The primary goal of the acquisition system depicted in Figure 43 is to measure up to 20 harmonics in a 60-Hz power network. Thus, the analog front-end must have sufficient bandwidth to detect signals up to 1260 Hz, as shown in Equation 6.

Equation 6. ADS8556 ADS8557 ADS8558 ADS8555_f_max.gif

Based on the bandwidth found in Equation 6, the ADS8556 device is set to simultaneously sample all six channels at 15.36 kSPS, which provides enough samples to clearly resolve even the highest harmonic required.

The passband of the configuration shown in Figure 44 is determined by the –3-dB frequency according to Equation 7. The value of CF is selected as 820 pF, which is a standard capacitance value available in 0603 size (surface-mount component) and such values, combined with that of RF, result in sufficient bandwidth to accommodate the required 20 harmonics (at 60 Hz).

Equation 7. ADS8556 ADS8557 ADS8558 ADS8555_f_3dB.gif

The value of R1 is selected as the parallel combination of RIN and RF to prevent the input bias current of the operational amplifier from generating an offset error.

The value of component C1 is chosen as 0.1 µF to provide a low-impedance path for noise signals that can be picked up by R1; this 0.1-µF capacitance value improves the EMI robustness and noise performance of the system.

The OPA2277 device is chosen for its low input offset voltage, low drift, bipolar swing, sufficient gain-bandwidth product and low quiescent current. For additional information on the procedure to select SAR ADC input drivers, see 16-bit 400KSPS 4-Ch. Multiplexed Data Acquisition Ref Design for High Voltage Inputs, Low Distortion, TIPD151.

The charge injection damping circuit is composed of R2 (49.9 Ω) and C2 (370 pF); these components reject high-frequency noise and meet the settling requirements of the ADS8556 device input.

Figure 45 shows the reference block used in this design.

ADS8556 ADS8557 ADS8558 ADS8555_REF_BLOCK.gif Figure 45. Reference Block

For more information on the design of charge injection damping circuits and reference driving circuits for SAR ADCs, consult the reference guide Power-optimized 16-bit 1MSPS Data Acquisition Block for Lowest Distortion and Noise Reference Design, TIDU014.

8.2.3 Application Curve

Figure 46 shows the frequency spectrum of the data acquired by the ADS8556 device for a sinusoidal, 20-VPP input at 60 Hz.

ADS8556 ADS8557 ADS8558 ADS8555_10Vp_60Hz.png Figure 46. Frequency Spectrum for a Sinusoidal 20-VPP Signal at 60 Hz

The ac performance parameters are:

  • SNR: 91.9 dB
  • THD: –99.68 dB
  • SNDR: 91.23 dB
  • SFDR: 103.65 dB