ZHCSD03D November   2014  – December 2015 ADS7044

PRODUCTION DATA.  

  1. 1 特性
  2. 2 应用
  3. 3 说明
  4. 4 修订历史记录
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Characteristics
    7. 6.7 Typical Characteristics
  7. 7 Parameter Measurement Information
    1. 7.1 Digital Voltage Levels
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Reference
      2. 8.3.2 Analog Input
      3. 8.3.3 ADC Transfer Function
      4. 8.3.4 Serial Interface
    4. 8.4 Device Functional Modes
      1. 8.4.1 Offset Calibration
        1. 8.4.1.1 Offset Calibration on Power-Up
        2. 8.4.1.2 Offset Calibration During Normal Operation
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Applications
      1. 9.2.1 Single-Supply DAQ with the ADS7044
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
          1. 9.2.1.2.1 Antialiasing Filter
          2. 9.2.1.2.2 Input Amplifier Selection
          3. 9.2.1.2.3 Reference Circuit
        3. 9.2.1.3 Application Curve
      2. 9.2.2 Ultra-Low Power and Ultra-Small, High CMRR DAQ Circuit with the ADS7044
        1. 9.2.2.1 Design Requirements
        2. 9.2.2.2 Detailed Design Procedure
        3. 9.2.2.3 Application Curves
  10. 10Power-Supply Recommendations
    1. 10.1 AVDD and DVDD Supply Recommendations
    2. 10.2 Estimating Digital Power Consumption
    3. 10.3 Optimizing Power Consumed by the Device
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12器件和文档支持
    1. 12.1 文档支持
      1. 12.1.1 相关文档　
    2. 12.2 社区资源
    3. 12.3 商标
    4. 12.4 静电放电警告
    5. 12.5 Glossary
  13. 13机械、封装和可订购信息

封装选项

请参考 PDF 数据表获取器件具体的封装图。

机械数据 (封装 | 引脚)
  • DCU|8
  • RUG|8
散热焊盘机械数据 (封装 | 引脚)
订购信息

4 修订历史记录

Changes from C Revision (February 2015) to D Revision

Changes from B Revision (December 2014) to C Revision

  • 已更改宽工作电压范围 特性 要点：已将 AVDD 的值从 1.8V 改为 1.65VGo
  • 已将宽模拟输入电压范围下限值改为 ±1.65V （说明 部分第一段）Go
  • Changed AVDD parameter minimum specification in Recommended Operating Conditions table Go
  • Changed EO parameter uncalibrated test conditions in Electrical Characteristics table Go
  • Changed Maximum throughput rate parameter test conditions in Electrical Characteristics table Go
  • Changed AVDD parameter minimum specification in Electrical Characteristics table Go
  • Changed conditions for Timing Characteristics table: changed range of AVDD and added CLOAD condition Go
  • Changed tD_CKDO specification in Timing Characteristics table Go
  • Added fSCLK minimum specification to Timing Characteristics table Go
  • Changed titles of Figure 26 to Figure 30Go
  • Changed Reference sub-section in Feature Description sectionGo
  • Changed AVDD range in description of fCLK-CAL parameter in Table 2 Go
  • Changed AVDD range in description of fCLK-CAL parameter in Table 3Go
  • Changed Reference Circuit section in Application InformationGo
  • Added last two sentences to AVDD and DVDD Supply Recommendations sectionGo

Changes from A Revision (November 2014) to B Revision

  • Changed ESD Ratings table to latest standards Go
  • Added footnote 3 to Electrical Characteristics table Go
  • Changed y-axis unit in Figure 30 Go

Changes from * Revision (November 2014) to A Revision

  • 已更改产品预览数据表Go