ZHCS158C July   2012  – January 2017 ADS1299 , ADS1299-4 , ADS1299-6

PRODUCTION DATA.  

  1. 1 特性
  2. 2 应用
  3. 3 说明
  4. 4 修订历史记录
  5. 5 Device Comparison
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Timing Requirements: Serial Interface
    7. 7.7 Switching Characteristics: Serial Interface
    8. 7.8 Typical Characteristics
  8. 8 Parametric Measurement Information
    1. 8.1 Noise Measurements
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 Analog Functionality
        1. 9.3.1.1 Input Multiplexer
          1. 9.3.1.1.1 Device Noise Measurements
          2. 9.3.1.1.2 Test Signals (TestP and TestN)
          3. 9.3.1.1.3 Temperature Sensor (TempP, TempN)
          4. 9.3.1.1.4 Supply Measurements (MVDDP, MVDDN)
          5. 9.3.1.1.5 Lead-Off Excitation Signals (LoffP, LoffN)
          6. 9.3.1.1.6 Auxiliary Single-Ended Input
        2. 9.3.1.2 Analog Input
        3. 9.3.1.3 PGA Settings and Input Range
          1. 9.3.1.3.1 Input Common-Mode Range
          2. 9.3.1.3.2 Input Differential Dynamic Range
          3. 9.3.1.3.3 ADC ΔΣ Modulator
          4. 9.3.1.3.4 Reference
      2. 9.3.2 Digital Functionality
        1. 9.3.2.1 Digital Decimation Filter
          1. 9.3.2.1.1 Sinc Filter Stage (sinx / x)
        2. 9.3.2.2 Clock
        3. 9.3.2.3 GPIO
        4. 9.3.2.4 ECG and EEG Specific Features
          1. 9.3.2.4.1 Input Multiplexer (Rerouting the BIAS Drive Signal)
          2. 9.3.2.4.2 Input Multiplexer (Measuring the BIAS Drive Signal)
          3. 9.3.2.4.3 Lead-Off Detection
            1. 9.3.2.4.3.1 DC Lead-Off
            2. 9.3.2.4.3.2 AC Lead-Off (One Time or Periodic)
          4. 9.3.2.4.4 Bias Lead-Off
          5. 9.3.2.4.5 Bias Drive (DC Bias Circuit)
            1. 9.3.2.4.5.1 Bias Configuration with Multiple Devices
    4. 9.4 Device Functional Modes
      1. 9.4.1 Start
        1. 9.4.1.1 Settling Time
      2. 9.4.2 Reset (RESET)
      3. 9.4.3 Power-Down (PWDN)
      4. 9.4.4 Data Retrieval
        1. 9.4.4.1 Data Ready (DRDY)
        2. 9.4.4.2 Reading Back Data
      5. 9.4.5 Continuous Conversion Mode
      6. 9.4.6 Single-Shot Mode
    5. 9.5 Programming
      1. 9.5.1 Data Format
      2. 9.5.2 SPI Interface
        1. 9.5.2.1 Chip Select (CS)
        2. 9.5.2.2 Serial Clock (SCLK)
        3. 9.5.2.3 Data Input (DIN)
        4. 9.5.2.4 Data Output (DOUT)
      3. 9.5.3 SPI Command Definitions
        1. 9.5.3.1  Sending Multi-Byte Commands
        2. 9.5.3.2  WAKEUP: Exit STANDBY Mode
        3. 9.5.3.3  STANDBY: Enter STANDBY Mode
        4. 9.5.3.4  RESET: Reset Registers to Default Values
        5. 9.5.3.5  START: Start Conversions
        6. 9.5.3.6  STOP: Stop Conversions
        7. 9.5.3.7  RDATAC: Read Data Continuous
        8. 9.5.3.8  SDATAC: Stop Read Data Continuous
        9. 9.5.3.9  RDATA: Read Data
        10. 9.5.3.10 RREG: Read From Register
        11. 9.5.3.11 WREG: Write to Register
    6. 9.6 Register Maps
      1. 9.6.1 User Register Description
        1. 9.6.1.1  ID: ID Control Register (address = 00h) (reset = xxh)
        2. 9.6.1.2  CONFIG1: Configuration Register 1 (address = 01h) (reset = 96h)
        3. 9.6.1.3  CONFIG2: Configuration Register 2 (address = 02h) (reset = C0h)
        4. 9.6.1.4  CONFIG3: Configuration Register 3 (address = 03h) (reset = 60h)
        5. 9.6.1.5  LOFF: Lead-Off Control Register (address = 04h) (reset = 00h)
        6. 9.6.1.6  CHnSET: Individual Channel Settings (n = 1 to 8) (address = 05h to 0Ch) (reset = 61h)
        7. 9.6.1.7  BIAS_SENSP: Bias Drive Positive Derivation Register (address = 0Dh) (reset = 00h)
        8. 9.6.1.8  BIAS_SENSN: Bias Drive Negative Derivation Register (address = 0Eh) (reset = 00h)
        9. 9.6.1.9  LOFF_SENSP: Positive Signal Lead-Off Detection Register (address = 0Fh) (reset = 00h)
        10. 9.6.1.10 LOFF_SENSN: Negative Signal Lead-Off Detection Register (address = 10h) (reset = 00h)
        11. 9.6.1.11 LOFF_FLIP: Lead-Off Flip Register (address = 11h) (reset = 00h)
        12. 9.6.1.12 LOFF_STATP: Lead-Off Positive Signal Status Register (address = 12h) (reset = 00h)
        13. 9.6.1.13 LOFF_STATN: Lead-Off Negative Signal Status Register (address = 13h) (reset = 00h)
        14. 9.6.1.14 GPIO: General-Purpose I/O Register (address = 14h) (reset = 0Fh)
        15. 9.6.1.15 MISC1: Miscellaneous 1 Register (address = 15h) (reset = 00h)
        16. 9.6.1.16 MISC2: Miscellaneous 2 (address = 16h) (reset = 00h)
        17. 9.6.1.17 CONFIG4: Configuration Register 4 (address = 17h) (reset = 00h)
  10. 10Applications and Implementation
    1. 10.1 Application Information
      1. 10.1.1 Unused Inputs and Outputs
      2. 10.1.2 Setting the Device for Basic Data Capture
        1. 10.1.2.1 Lead-Off
        2. 10.1.2.2 Bias Drive
      3. 10.1.3 Establishing the Input Common-Mode
      4. 10.1.4 Multiple Device Configuration
        1. 10.1.4.1 Cascaded Mode
        2. 10.1.4.2 Daisy-Chain Mode
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
      3. 10.2.3 Application Curves
  11. 11Power Supply Recommendations
    1. 11.1 Power-Up Sequencing
    2. 11.2 Connecting the Device to Unipolar (5 V and 3.3 V) Supplies
    3. 11.3 Connecting the Device to Bipolar (±2.5 V and 3.3 V) Supplies
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  13. 13器件和文档支持
    1. 13.1 文档支持
      1. 13.1.1 相关文档　
    2. 13.2 相关链接
    3. 13.3 接收文档更新通知
    4. 13.4 社区资源
    5. 13.5 商标
    6. 13.6 静电放电警告
    7. 13.7 Glossary
  14. 14机械、封装和可订购信息

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

1 特性

  • 多达 8 个低噪声可编程增益放大器 (PGA) 和 8 个高分辨率同步采样模数转换器 (ADC)
  • 输入参考噪声：1 μVPP（带宽为 70Hz）
  • 输入偏置电流：300pA
  • 数据速率：250 每秒采样率 (SPS) 至 16 每秒千次采样 (kSPS)
  • 共模抑制比 (CMRR)：-110dB
  • 可编程增益：1，2，4，6，8，12 或者 24
  • 单极或者双极电源：
    • 模拟：4.75V 至 5.25V
    • 数字：1.8V 至 3.6V
  • 内置偏置驱动放大器，
    持续断线检测，测试信号
  • 内置振荡器
  • 内部或者外部基准
  • 灵活的省电、待机模式
  • 与ADS129x 引脚兼容
  • 兼容串行外设接口 (SPI) 的串行接口
  • 工作温度范围：-40°C 至 +85°C

2 应用

  • 医疗器械，包括：
    • 脑电图 (EEG) 研究
    • 胎儿心电图 (ECG)
    • 睡眠研究监视器
    • 双谱指数 (BIS)
    • 诱发音频电位 (EAP)

3 说明

ADS1299-4、ADS1299-6 和 ADS1299 器件是一系列四通道、六通道和八通道低噪声、24 位同步采样 Δ-Σ 模数转换器(ADC)系列产品。该系列内置可编程增益放大器 (PGA)、内部基准以及板载振荡器。ADS1299-x 具备 颅外脑电图 (EEG) 和心电图 (ECG) 应用 所需的 全部常用功能。凭借高集成度和出色性能，ADS1299-x 能够以大幅缩小的尺寸、显著降低的功耗和整体成本构建可扩展的医疗仪器系统。

ADS1299-x 在每条通道中配有一个灵活的输入多路复用器，该复用器可与内部生成的信号独立相连，完成测试、温度和导联断开检测。此外，可选择输入通道的任一配置生成患者偏置输出信号。提供可选 SRB 引脚，旨在将公共信号路由至参考蒙太奇配置的多路输入。ADS1299-x 以 250SPS 至 16kSPS 的数据传输速率运行。可通过激励电流阱/电流源在器件内部实现导联断开检测。

可在通道较多的系统中采用菊花链配置串联多个 ADS1299-4、ADS1299-6 或 ADS1299 器件。ADS1299-x 采用 TQFP-64 封装，工作温度介于 –40°C 至 +85°C 之间。

器件信息(1)

器件型号 封装 封装尺寸（标称值）
ADS1299-x TQFP (64) 10.00mm x 10.00mm
  1. 要了解所有可用封装，请参见数据表末尾的可订购产品附录。

方框图

ADS1299 ADS1299-4 ADS1299-6 alt_sbas499.gif

4 修订历史记录

Changes from B Revision (October 2016) to C Revision

  • Changed Maximum Junction parameter name to Junction in Absolute Maximum Ratings tableGo
  • Changed Recommended Operating Conditions table: changed free-air to ambient in conditions statement, changed specifications of Input voltage parameter, and added VCM and fCLK symbolsGo
  • Changed conditions statement of Electrical Characteristics table: added TA to temperature conditions, moved DVDD condition to after AVDD – AVSS condition Go
  • Changed Input bias current parameter test conditions from input to InxP and INxNGo
  • Changed Drift parameter unit from ppm to ppm/°C and changed Internal clock accuracy parameter test conditions from –40°C ≤ TA ≤ +85°C to TA = –40°C to +85°C in Electrical Characteristics tableGo
  • Changed IAVDD and IDVDD parameters [deleted (normal mode) from parameter names and added Normal mode to test conditions], and deleted Quiescent from Power dissipation parameter name in Electrical Characteristics tableGo
  • Changed free-air to ambient in conditions statement of Timing Requirements: Serial Interface tableGo
  • Changed Analog Input section Go
  • Changed Table 9 cross-reference to Table 7 in Settling Time sectionGo
  • Changed Ideal Output Code versus Input Signal table: changed all VREF in first column to FS in and deleted footnote 1 Go
  • Changed reset settings of bits 4 and 3 in bit register of CONFIG1 registerGo
  • Changed reset value settings of bits 7 to 5 in CONFIG2 register: split cells apartGo
  • Changed reset value settings of bits 6 to 5 in CONFIG3 register: split cells apart Go
  • Changed AVDD – AVSS to AVDD + AVSS in description of bit 3 in Configuration Register 3 Field DescriptionsGo
  • Changed Lead-Off Control Register Field Descriptions table: changed 01 bit setting of bits 3:2 to 24 nA from 12 nA changed description of bits 1:0Go
  • Changed Unused Inputs and Outputs section: added DRDY description, deleted statement of not floating unused digital inputs Go
  • Deleted second Layout Guidelines sub-section from Layout section Go

Changes from A Revision (August 2012) to B Revision

  • Added ESD 额定值表，特性 描述 部分，器件功能模式，应用和实施部分，电源相关建议部分，布局部分，器件和文档支持部分以及机械、封装和可订购信息部分Go
  • Added ADS1299-4 和 ADS1299-6 至文档Go
  • Added Go
  • Deleted 低功耗 特性要点Go
  • Changed 颅外脑电图 (EEG)（位于应用 和 说明 部分Go
  • Deleted 最后一个应用要点Go
  • Changed 说明部分：已添加有关 SRB 引脚的句子，已更改第二段的最后一句Go
  • Changed 通篇文档中的 ADS1299 系列器件至 ADS1299-xGo
  • Changed 框图：已添加虚线框 Go
  • Changed specifications for Lead-Off Detect, Frequency parameter of Electrical Characteristics tableGo
  • Added specifications for ADS1299-4 and ADS1299-6 in Supply Current (Bias Turned Off) and Power Dissipation (Analog Supply = 5 V, Bias Amplifiers Turned Off) sections of Electrical Characteristics tableGo
  • Changed Noise Measurements sectionGo
  • Changed Functional Block Diagram to show channels 5-8 not covered in ADS1299-4 and channels 7-8 not covered in ADS1299-6Go
  • Changed INxP and INxN pins in Figure 18 Go
  • Changed Figure 23: changed PgaP, PgaN to PGAp, PGAn Go
  • Changed Input Common-Mode Range section: changed input common-mode range description Go
  • Changed differential input voltage range in the Input Differential Dynamic Range sectionGo
  • Changed Figure 34: MUX8[2:0] = 010 on IN8N, and BIAS_MEAS = 1 on BIASINGo
  • Changed first sentence of second paragraph in Lead-Off Detection sectionGo
  • Changed AC Lead-Off (One Time or Periodic) sectionGo
  • Changed Bias Lead-Off sectionGo
  • Changed title of Figure 38 and power-down description in Bias Drive (DC Bias Circuit) sectionGo
  • Changed START Opcode to START in Figure 39Go
  • Changed Reset (RESET) section for clarityGo
  • Changed title, first paragraph, START Opcode and STOP Opcode to START and STOP (Figure 42), and STOP Opcode to STOP Command (Figure 43) in Continuous Conversion Mode sectionGo
  • Added last sentence to Data Input (DIN) sectionGo
  • Added cross-reference to the Sending Multi-Byte Commands section in RDATAC: Read Data Continuous section Go
  • Changed RDATAC Opcode to RDATAC in Figure 46Go
  • Changed RDATA Opcode to RDATA in Figure 46Go
  • Changed description of SCLK rate restrictions, OPCODE 1 and OPCODE 2 to BYTE 1 and BYTE 2 in Figure 48 of RREG: Read From Register sectionGo
  • Changed footnotes 1 and 2 and added more cross-references to footnotes in rows 0Dh to 11h in Table 11 Go
  • Changed register description and description of bit 5 in MISC1: Miscellaneous 1 Register sectionGo
  • Changed output names in Figure 68 from RA, LA, and RL to Electrode 1, Electrode 2, and BIAS Electrode, respectivelyGo
  • Changed Power-Up Sequencing sectionGo

Changes from * Revision (July 2012) to A Revision

  • Changed 器件系列和订购信息表的产品栏 Go