SN74LVC1G08 单路 2 输入正与门 | 德州仪器 TI.com.cn

SN74LVC1G08 (正在供货)

单路 2 输入正与门

单路 2 输入正与门 - SN74LVC1G08
数据表
 

描述

This single 2-input positive-AND gate is designed for 1.65-V to 5.5-V VCC operation.

The SN74LVC1G08 device performs the Boolean function or in positive logic.

The CMOS device has high output drive while maintaining low static power dissipation over a broad VCC operating range.

The SN74LVC1G08 is available in a variety of packages, including the ultra-small DPW package with a body size of 0.8 mm × 0.8 mm.

特性

  • Available in the Ultra Small 0.64-mm2
    Package (DPW) With 0.5-mm Pitch
  • Supports 5-V VCC Operation
  • Inputs Accept Voltages to 5.5 V
  • Provides Down Translation to VCC
  • Max tpd of 3.6 ns at 3.3 V
  • Low Power Consumption, 10-μA Max ICC
  • ±24-mA Output Drive at 3.3 V
  • Ioff Supports Live Insertion, Partial-Power-Down Mode, and Back Drive Protection
  • Latch-Up Performance Exceeds 100 mA
    Per JESD 78, Class II
  • ESD Protection Exceeds JESD 22
    • 2000-V Human-Body Model (A114-A)
    • 200-V Machine Model (A115-A)
    • 1000-V Charged-Device Model (C101)

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参数 与其它产品相比 与门

 
Technology Family
VCC (Min) (V)
VCC (Max) (V)
Channels (#)
Inputs per channel
ICC @ Nom Voltage (Max) (mA)
tpd @ Nom Voltage (Max) (ns)
IOL (Max) (mA)
IOH (Max) (mA)
Input Type
Output Type
Features
Data Rate (Max) (Mbps)
Rating
Operating Temperature Range (C)
Package Group
Package Size: mm2:W x L (PKG)
SN74LVC1G08 SN74LVC1G00 SN74LVC1G02 SN74LVC1G08-EP SN74LVC1G08-Q1 SN74LVC1G32 SN74LVC1G32-EP SN74LVC1G32-Q1
LVC     LVC     LVC     LVC     LVC     LVC     LVC     LVC    
1.65     1.65     1.65     1.65     1.65     1.65     1.65     1.65    
5.5     5.5     5.5     5.5     5.5     5.5     5.5     5.5    
1     1     1       1     1       1    
2     1     2       2     2       2    
0.01     0.01     0.01     0.01     0.01     0.01     0.01     0.025    
4.5
6
4
5    
9
5.5
4.7
4    
8
5.5
4.5
4    
8
5.5
4.5
4    
8
5.5
4.5
4    
7.2
4.4
3.6
3.4    
8
6.5
5.7
4.5    
11
7.5
6.5
6    
32     32     32     32     32     32     32     32    
-32     -32     -32     -32     -32     -32     -32     -32    
Standard CMOS     Standard CMOS     Standard CMOS     CMOS
TTL    
Standard CMOS     Standard CMOS     CMOS
TTL    
Standard CMOS    
Push-Pull     Push-Pull     Push-Pull     CMOS     Push-Pull     Push-Pull     CMOS     Push-Pull    
Partial Power Down (Ioff)
Over-Voltage Tolerant Inputs
Ultra High Speed (tpd <5ns)    
Partial Power Down (Ioff)
Over-Voltage Tolerant Inputs
Ultra High Speed (tpd <5ns)    
Partial Power Down (Ioff)
Over-Voltage Tolerant Inputs
Ultra High Speed (tpd <5ns)    
Ioff
down translation to Vcc
Small DPW package
low power    
Partial Power Down (Ioff)
Over-Voltage Tolerant Inputs
Ultra High Speed (tpd <5ns)    
Partial Power Down (Ioff)
Over-Voltage Tolerant Inputs
Ultra High Speed (tpd <5ns)    
Ioff
down translation to Vcc
low power    
Partial Power Down (Ioff)
Over-Voltage Tolerant Inputs
Very High Speed (tpd 5-10ns)    
100     100     100       100     100       100    
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