SN65MLVD203

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全双工 M-LVDS 收发器

产品详情

Function Transceiver Protocols M-LVDS Number of transmitters 1 Number of receivers 1 Supply voltage (V) 3.3 Signaling rate (Mbps) 200 Input signal LVTTL, M-LVDS Output signal LVTTL, M-LVDS Rating Catalog Operating temperature range (°C) -40 to 85
Function Transceiver Protocols M-LVDS Number of transmitters 1 Number of receivers 1 Supply voltage (V) 3.3 Signaling rate (Mbps) 200 Input signal LVTTL, M-LVDS Output signal LVTTL, M-LVDS Rating Catalog Operating temperature range (°C) -40 to 85
SOIC (D) 14 51.9 mm² 8.65 x 6
  • Low-Voltage Differential 30- Line Drivers and Receivers for Signaling Rates(1) Up to 200 Mbps
  • Type-1 Receivers Incorporate 25 mV of Hysteresis
  • Type-2 Receivers Provide an Offset (100 mV) Threshold to Detect Open-Circuit and Idle-Bus Conditions
  • Meets or Exceeds the M-LVDS Standard TIA/EIA-899 for Multipoint Data Interchange
  • Controlled Driver Output Voltage Transition Times for Improved Signal Quality
  • –1 V to 3.4 V Common-Mode Voltage Range Allows Data Transfer With 2 V of Ground Noise
  • Bus Pins High Impedance When Disabled or VCC ≤ 1.5 V
  • 100-Mbps Devices Available (SN65MLVD200A, 202A, 204A, 205A)
  • M-LVDS Bus Power Up/Down Glitch Free
  • APPLICATIONS
    • Low-Power High-Speed Short-Reach
      Alternative to TIA/EIA-485
    • Backplane or Cabled Multipoint Data and Clock Transmission
    • Cellular Base Stations
    • Central-Office Switches
    • Network Switches and Routers

(1) The signaling rate of a line, is the number of voltage transitions that are made per second expressed in the units bps (bits per second).

  • Low-Voltage Differential 30- Line Drivers and Receivers for Signaling Rates(1) Up to 200 Mbps
  • Type-1 Receivers Incorporate 25 mV of Hysteresis
  • Type-2 Receivers Provide an Offset (100 mV) Threshold to Detect Open-Circuit and Idle-Bus Conditions
  • Meets or Exceeds the M-LVDS Standard TIA/EIA-899 for Multipoint Data Interchange
  • Controlled Driver Output Voltage Transition Times for Improved Signal Quality
  • –1 V to 3.4 V Common-Mode Voltage Range Allows Data Transfer With 2 V of Ground Noise
  • Bus Pins High Impedance When Disabled or VCC ≤ 1.5 V
  • 100-Mbps Devices Available (SN65MLVD200A, 202A, 204A, 205A)
  • M-LVDS Bus Power Up/Down Glitch Free
  • APPLICATIONS
    • Low-Power High-Speed Short-Reach
      Alternative to TIA/EIA-485
    • Backplane or Cabled Multipoint Data and Clock Transmission
    • Cellular Base Stations
    • Central-Office Switches
    • Network Switches and Routers

(1) The signaling rate of a line, is the number of voltage transitions that are made per second expressed in the units bps (bits per second).

The SN65MLVD201, 203, 206, and 207 are multipoint-low-voltage differential (M-LVDS) line drivers and receivers, which are optimized to operate at signaling rates up to 200 Mbps. All parts comply with the multipoint low-voltage differential signaling (M-LVDS) standard TIA/EIA-899. These circuits are similar to their TIA/EIA-644 standard compliant LVDS counterparts, with added features to address multipoint applications. The driver output has been designed to support multipoint buses presenting loads as low as 30 , and incorporates controlled transition times to allow for stubs off of the backbone transmission line.

These devices have Type-1 and Type-2 receivers that detect the bus state with as little as 50 mV of differential input voltage over a common-mode voltage range of –1 V to 3.4 V. The Type-1 receivers exhibit 25 mV of differential input voltage hysteresis to prevent output oscillations with slowly changing signals or loss of input. Type-2 receivers include an offset threshold to provide a known output state under open-circuit, idle-bus, and other faults conditions. The devices are characterized for operation from –40°C to 85°C.

The SN65MLVD201, 203, 206, and 207 are multipoint-low-voltage differential (M-LVDS) line drivers and receivers, which are optimized to operate at signaling rates up to 200 Mbps. All parts comply with the multipoint low-voltage differential signaling (M-LVDS) standard TIA/EIA-899. These circuits are similar to their TIA/EIA-644 standard compliant LVDS counterparts, with added features to address multipoint applications. The driver output has been designed to support multipoint buses presenting loads as low as 30 , and incorporates controlled transition times to allow for stubs off of the backbone transmission line.

These devices have Type-1 and Type-2 receivers that detect the bus state with as little as 50 mV of differential input voltage over a common-mode voltage range of –1 V to 3.4 V. The Type-1 receivers exhibit 25 mV of differential input voltage hysteresis to prevent output oscillations with slowly changing signals or loss of input. Type-2 receivers include an offset threshold to provide a known output state under open-circuit, idle-bus, and other faults conditions. The devices are characterized for operation from –40°C to 85°C.

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类型 标题 下载最新的英语版本 日期
* 数据表 Multipoint-LVDS Line Driver and Receiver 数据表 (Rev. C) 2008年 1月 7日
应用手册 Introduction to M-LVDS (TIA/EIA-899) (Rev. A) 2013年 1月 3日
用户指南 Multipoint-Low Voltage Differential Signaling (M-LVDS) EVM (Rev. B) 2004年 4月 5日
应用手册 M-LVDS Signaling Rate Versus Distance 2003年 4月 9日
应用手册 Interoperability of M-LVDS and BusLVDS 2003年 2月 6日
用户指南 200 Mbps Multipoint-Low Voltage Differential Signaling (M-LVDS) EVM (Rev. A) 2002年 12月 20日
应用手册 Wired-Logic Signaling with M-LVDS 2002年 10月 31日
用户指南 Multipoint-Low Voltage Differential Signaling (M-LVDS) Evaluation Module 2002年 3月 4日
应用手册 TIA/EIA-485 and M-LVDS, Power and Speed Comparison 2002年 2月 20日

设计和开发

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评估板

MLVD20XBEVM — SN65MLVD203B and SN65MLVD204B full-duplex and half-duplex multipoint LVDS (M-LVDS) evaluation module

用户指南: PDF
TI.com 上无现货
评估板

MLVD20XEVM — M-LVDS 评估模块

此评估模块适用于 M-LVDS 收发器 SN65MLVD203B 和 SN65MLVD204B。
SN65MLVD203B 是全双工收发器,SN65MLVD204B 是半双工收发器。
用户指南: PDF
TI.com 上无现货
仿真模型

SN65MLVD203 IBIS Model (Rev. A)

SLLC118A.ZIP (18 KB) - IBIS Model
模拟工具

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用户指南: PDF
英语版 (Rev.A): PDF
参考设计

TIDA-00330 — 增强隔离型 M-LVDS 收发器参考设计

此参考设计演示的是采用 ISO7842 和 SN65MLVD203 的增强型隔离式全双工 M-LVDS 收发器节点的性能。单一增强型数字隔离器代替了两个基本数字隔离器,降低了成本并节省了 PCB 上的空间。
设计指南: PDF
原理图: PDF
封装 引脚 CAD 符号、封装和 3D 模型
SOIC (D) 14 Ultra Librarian

订购和质量

包含信息:
  • RoHS
  • REACH
  • 器件标识
  • 引脚镀层/焊球材料
  • MSL 等级/回流焊峰值温度
  • MTBF/时基故障估算
  • 材料成分
  • 鉴定摘要
  • 持续可靠性监测
包含信息:
  • 制造厂地点
  • 封装厂地点

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