Product details

Number of channels 1 Total supply voltage (+5 V = 5, ±5 V = 10) (min) (V) 3.75 Total supply voltage (+5 V = 5, ±5 V = 10) (max) (V) 5.25 BW at Acl (MHz) 2000 Acl, min spec gain (V/V) 2 Slew rate (typ) (V/µs) 6400 Architecture Bipolar, Fully Differential ADC Driver Vn at flatband (typ) (nV√Hz) 2.3 Iq per channel (typ) (mA) 39.2 Rail-to-rail In to V- Vos (offset voltage at 25°C) (max) (mV) 4 Operating temperature range (°C) -40 to 85 Iout (typ) (mA) 96 2nd harmonic (dBc) 104 3rd harmonic (dBc) 105 Frequency of harmonic distortion measurement (MHz) 10 GBW (typ) (MHz) 3000 Input bias current (max) (pA) 15500000 Features Decompensated, Shutdown CMRR (typ) (dB) 90 Rating Catalog
Number of channels 1 Total supply voltage (+5 V = 5, ±5 V = 10) (min) (V) 3.75 Total supply voltage (+5 V = 5, ±5 V = 10) (max) (V) 5.25 BW at Acl (MHz) 2000 Acl, min spec gain (V/V) 2 Slew rate (typ) (V/µs) 6400 Architecture Bipolar, Fully Differential ADC Driver Vn at flatband (typ) (nV√Hz) 2.3 Iq per channel (typ) (mA) 39.2 Rail-to-rail In to V- Vos (offset voltage at 25°C) (max) (mV) 4 Operating temperature range (°C) -40 to 85 Iout (typ) (mA) 96 2nd harmonic (dBc) 104 3rd harmonic (dBc) 105 Frequency of harmonic distortion measurement (MHz) 10 GBW (typ) (MHz) 3000 Input bias current (max) (pA) 15500000 Features Decompensated, Shutdown CMRR (typ) (dB) 90 Rating Catalog
VQFN (RGT) 16 9 mm² 3 x 3
  • Fully Differential Architecture
  • Common-Mode Input Range Includes the
    Negative Rail
  • Minimum Gain of 2 V/V (6 dB)
  • Bandwidth: 2 GHz
  • Slew Rate: 6400 V/µs
  • 1% Settling Time: 2 ns
  • HD2: -72 dBc at 100 MHz
  • HD3: -79 dBc at 100 MHz
  • OIP2: 78 dBm at 70 MHz
  • OIP3: 42 dBm at 70 MHz
  • Input Voltage Noise: 2.3 nV/√Hz (f > 10 MHz)
  • Noise Figure: 19.2 dB (G = 10 dB)
  • Output Common-Mode Control
  • 5-V Power Supply Current: 39.2 mA
  • Power-Down Capability: 0.65 mA
  • APPLICATIONS
    • 5-V Data-Acquisition Systems
    • High Linearity ADC Amplifier
    • Wireless Communication
    • Medical Imaging
    • Test and Measurement

  • Fully Differential Architecture
  • Common-Mode Input Range Includes the
    Negative Rail
  • Minimum Gain of 2 V/V (6 dB)
  • Bandwidth: 2 GHz
  • Slew Rate: 6400 V/µs
  • 1% Settling Time: 2 ns
  • HD2: -72 dBc at 100 MHz
  • HD3: -79 dBc at 100 MHz
  • OIP2: 78 dBm at 70 MHz
  • OIP3: 42 dBm at 70 MHz
  • Input Voltage Noise: 2.3 nV/√Hz (f > 10 MHz)
  • Noise Figure: 19.2 dB (G = 10 dB)
  • Output Common-Mode Control
  • 5-V Power Supply Current: 39.2 mA
  • Power-Down Capability: 0.65 mA
  • APPLICATIONS
    • 5-V Data-Acquisition Systems
    • High Linearity ADC Amplifier
    • Wireless Communication
    • Medical Imaging
    • Test and Measurement

The THS4508 is a wideband, fully-differential operational amplifier designed for single-supply 5-V data acquisition systems. It has very low noise at 2.3 nV/√Hz, and extremely low harmonic distortion of -72 dBc HD2 and -79 dBc HD3 at 100 MHz with 2 VPP, G = 10 dB, and 1-Ω load. Slew rate is very high at 6400 Vµs, and with settling time of 2 ns to 1% (2 V step), it is ideal for pulsed applications. It is designed for minimum gain of 6 dB, but is optimized for gain of 10 dB.

To allow for dc coupling to analog-to-digital converters (ADCs), its unique output common-mode control circuit maintains the output common-mode voltage within 5-mV offset (typical) from the set voltage, when set within 0.5 V of mid-supply. The common-mode set point is set to mid-supply by internal circuitry, which may be over-driven from an external source.

The THS4508 is a high-performance amplifier that has been optimized for use in high performance, 5-V single-supply data acquisition systems. The output has been optimized for best performance with its common-mode voltages set to mid-supply, and the input has been optimized for best performance with its common-mode voltage set to 0.7 V. High performance at a low power-supply voltage is ideal for high-performance, single-supply 5-V data-acquisition systems with a minimum parts count. The combined performance of the THS4508 in a gain of 10-dB driving the ADS5500 ADC, sampling at 125 MSPS, is 82-dBc SFDR, and 68.3-dBc SNR with a -1-dBFS signal at 70 MHz.

The THS4508 is offered in a quad 16-pin leadless QFN package (RGT), and is characterized for operation over the full industrial temperature range from -40°C to +85°C.

The THS4508 is a wideband, fully-differential operational amplifier designed for single-supply 5-V data acquisition systems. It has very low noise at 2.3 nV/√Hz, and extremely low harmonic distortion of -72 dBc HD2 and -79 dBc HD3 at 100 MHz with 2 VPP, G = 10 dB, and 1-Ω load. Slew rate is very high at 6400 Vµs, and with settling time of 2 ns to 1% (2 V step), it is ideal for pulsed applications. It is designed for minimum gain of 6 dB, but is optimized for gain of 10 dB.

To allow for dc coupling to analog-to-digital converters (ADCs), its unique output common-mode control circuit maintains the output common-mode voltage within 5-mV offset (typical) from the set voltage, when set within 0.5 V of mid-supply. The common-mode set point is set to mid-supply by internal circuitry, which may be over-driven from an external source.

The THS4508 is a high-performance amplifier that has been optimized for use in high performance, 5-V single-supply data acquisition systems. The output has been optimized for best performance with its common-mode voltages set to mid-supply, and the input has been optimized for best performance with its common-mode voltage set to 0.7 V. High performance at a low power-supply voltage is ideal for high-performance, single-supply 5-V data-acquisition systems with a minimum parts count. The combined performance of the THS4508 in a gain of 10-dB driving the ADS5500 ADC, sampling at 125 MSPS, is 82-dBc SFDR, and 68.3-dBc SNR with a -1-dBFS signal at 70 MHz.

The THS4508 is offered in a quad 16-pin leadless QFN package (RGT), and is characterized for operation over the full industrial temperature range from -40°C to +85°C.

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Technical documentation

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Type Title Date
* Data sheet Wideband Low Noise Low Distortion Fully Differential Amplifier datasheet (Rev. E) 09 Sep 2008
E-book The Signal e-book: A compendium of blog posts on op amp design topics 28 Mar 2017
Application note Driving High-Speed ADCs: Circuit Topologies and System-Level Parameters (Rev. A) 10 Sep 2010
Analog Design Journal Low-power, high-intercept interface to the ADS5424, 105-MSPS converter 10 Oct 2005
Analog Design Journal Analysis of fully differential amplifiers 11 Mar 2005
Analog Design Journal Fully differential amplifiers applications:Line termination,driving high-speed.. 02 Mar 2005
Application note Noise Analysis for High Speed Op Amps (Rev. A) 17 Jan 2005

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