ZHCSCE8F April   2014  – May 2019 TPD1S514

PRODUCTION DATA.  

  1. 1 特性
  2. 2 应用
  3. 3 说明
    1.     Device Images
      1.      TPD1S514 系列电路保护方案
      2.      TPD1S514 系列方框图
  4. 4 修订历史记录
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
    1.     Pin Functions
  7. 7 Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  Thermal Information
    5. 7.5  Supply Current Consumption
    6. 7.6  Electrical Characteristics EN Pin
    7. 7.7  Thermal Shutdown Feature
    8. 7.8  Electrical Characteristics nFET Switch
    9. 7.9  Electrical Characteristics OVP Circuit
    10. 7.10 Electrical Characteristics VBUS_POWER Circuit
    11. 7.11 Timing Requirements
    12. 7.12 TPD1S514-1 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  Over Voltage Protection on VBUS_CON up to 30 V DC
      2. 8.3.2  Precision OVP (< ±1% Tolerance)
      3. 8.3.3  Low RON nFET Switch Supports Host and Charging Mode
      4. 8.3.4  VBUS_POWER, TPD1S514-1, TPD1S514-2, TPD1S514-3
      5. 8.3.5  VBUS_POWER, TPD1S514
      6. 8.3.6  Powering the System When Battery is Discharged
      7. 8.3.7  ±15 kV IEC 61000-4-2 Level 4 ESD Protection
      8. 8.3.8  100 V IEC 61000-4-5 µs Surge Protection
      9. 8.3.9  Startup and OVP Recovery Delay
      10. 8.3.10 Thermal Shutdown
    4. 8.4 Device Functional Modes
      1. 8.4.1 Operation With VBUS_CON < 3.5 V (Minimum VBUS_CON)
      2. 8.4.2 Operation With VBUS_CON > VOVP
      3. 8.4.3 OTG Mode
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Applications
      1. 9.2.1 TPD1S514-1 USB 2.0/3.0 Case 1: Always Enabled
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
          1. 9.2.1.2.1 VBUS Voltage Range
          2. 9.2.1.2.2 Discharged Battery
        3. 9.2.1.3 Application Curves
      2. 9.2.2 TPD1S514-1 USB 2.0/3.0 Case 2: PMIC Controlled EN
        1. 9.2.2.1 Design Requirements
        2. 9.2.2.2 Detailed Design Procedure
          1. 9.2.2.2.1 VBUS Voltage Range
          2. 9.2.2.2.2 PMIC Power Requirement
          3. 9.2.2.2.3 Discharged Battery
        3. 9.2.2.3 Application Curve
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12器件和文档支持
    1. 12.1 社区资源
    2. 12.2 商标
    3. 12.3 静电放电警告
    4. 12.4 Glossary
  13. 13机械、封装和可订购信息

12.3 静电放电警告

esds-image

ESD 可能会损坏该集成电路。德州仪器 (TI) 建议通过适当的预防措施处理所有集成电路。如果不遵守正确的处理措施和安装程序 , 可能会损坏集成电路。

ESD 的损坏小至导致微小的性能降级 , 大至整个器件故障。 精密的集成电路可能更容易受到损坏 , 这是因为非常细微的参数更改都可能会导致器件与其发布的规格不相符。