ZHCS442F September   2011  – November 2016 TPS62080 , TPS62080A , TPS62081 , TPS62082

PRODUCTION DATA.  

  1. 特性
  2. 应用范围
  3. 说明
  4. 修订历史记录
  5. Device Comparison Table
  6. Pin Configuration and Functions
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagrams
    3. 8.3 Feature Description
      1. 8.3.1 Power Good
      2. 8.3.2 100% Duty Cycle Low Dropout Operation
      3. 8.3.3 Output Discharge
      4. 8.3.4 Soft-Start
      5. 8.3.5 Undervoltage Lockout
      6. 8.3.6 Thermal Shutdown
      7. 8.3.7 Inductor Current Limit
    4. 8.4 Device Functional Modes
      1. 8.4.1 Enabling and Disabling the Device
      2. 8.4.2 Power Save Mode
      3. 8.4.3 Snooze Mode
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Setting the Output Voltage
          1. 9.2.2.1.1 Adjustable Output Voltage Version
        2. 9.2.2.2 Output Filter Design
        3. 9.2.2.3 Inductor Selection
        4. 9.2.2.4 Capacitor Selection
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
    3. 11.3 Thermal Considerations
  12. 12器件和文档支持
    1. 12.1 器件支持
      1. 12.1.1 Third-Party Products Disclaimer
    2. 12.2 文档支持
      1. 12.2.1 相关文档 
    3. 12.3 相关链接
    4. 12.4 接收文档更新通知
    5. 12.5 社区资源
    6. 12.6 商标
    7. 12.7 静电放电警告
    8. 12.8 Glossary
  13. 13机械、封装和可订购信息

Pin Configuration and Functions

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DSG Package
8-Pin WSON With Thermal Pad
(Top View)
TPS62080 TPS62080A TPS62081 TPS62082 TPS62080_pin_assign.gif

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Pin Functions

PIN I/O DESCRIPTION
NAME NO.
EN 1 IN Device Enable Logic Input.
Logic HIGH enables the device, logic LOW disables the device and turns it into shutdown. Do not leave floating.
GND 2 PWR Power and Signal Ground.
MODE 3 IN Snooze Mode Enable Logic Input.
Logic HIGH enables the Snooze Mode, logic LOW disables the Snooze Mode. Do not leave floating.
FB 4 IN Feedback Pin for the internal control loop.
Connect this pin to the external feedback divider for the adjustable output versions. For the fixed output voltage versions, this pin must be left floating or connected to GND.
VOS 5 IN Output Voltage Sense Pin for the internal control loop. Must be connected to output voltage.
PG 6 OUT Power Good open drain output.
This pin is pulled to low if the output voltage is below regulation limits. Can be left floating if not used.
SW 7 PWR Switch Pin connected to the internal MOSFET switches and inductor terminal.
Connect the inductor of the output filter here.
VIN 8 PWR Power Supply Voltage Input.
Exposed Thermal Pad Connect it to GND. The thermal pad must be soldered to achieve appropriate power dissipation and mechanical reliability.