This application report discusses the thermal performance of the Sitara™ AM574x series processors. The data presented demonstrates the effects of different thermal management strategies in terms of processor junction temperature and power consumption across MPU loading and ambient temperature.
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In this experiment, an internal AM574x board is used to gather thermal data with different processor loading and ambient temperature. Ambient temperature is controlled with a programmable environmental chamber.
The collected data can be utilized to correlate the thermal performance of the processor and power consumption at a given processor load and junction temperature, based on ambient temperature and thermal management.
Tests were repeated with the following thermal management:
The environmental chamber used to collect this data circulates air internally to maintain homogeneous internal temperature, and does not accurately simulate the environment on the bench or end product. This is important to consider in passive cooling applications where air circulation can significantly impact PCB, package, and heatsink power dissipation efficiency.
The data presented in this test is gathered with a typical device, representing nominal silicon process and leakage. Thermal performance and power consumption can vary significantly due to process variation. Extra margin must be designed in to account for worst case process variation (leakage).
The following CPU loading schemes are characterized with the internal AM574x board for this report.
The AM574x processor is idling after booting the out-of-box configuration of Processor SDK Linux® v05.02.00. No display was connected to the AM574x board. MPU, GPU, and IVA cores are powered but automatically clock gated while the DSP and IPU cores are both power and clock gated.
Dhrystone is a single-threaded benchmark, capable of utilizing approximately 100% of one Arm®Cortex®-A15 core. Dhyrstone is included in the TI Processor SDK. Tests are conducted with the A15 running at 1.0 GHz (OPP_NOM) and 1.5 GHz (OPP_HIGH).
Reported temperature data is measured by on-die sensors to the approximate actual junction temperature. Temperature for each use-case is measured after soaking for five minutes. Under lab conditions, it is determined a five minute period allows the processor to reach stable temperature.
The TI Processor SDK provides Linux drivers for these sensors, and can be queried from the command-line. For example:
# cat /sys/class/thermal/thermal_zone0/temp
71800
Operating performance points (OPP) levels define a max frequency per fixed voltage level in each voltage domain. Table 1 lists the frequency of each subsystem per OPP for the AM574x processor.
Dynamic Voltage Frequency Scaling (DVFS) refers to a software technique where the system-on-chip (SoC) supplies with AVS support are changed from one OPP level (voltage and frequency pair) to another to either adapt to a changing work-load, or to avoid device operation outside of desired temperature bounds.
This SoC only supports DVFS on the MPU domain. For DSP and GPU domains, the OPP levels must be set during boot by the initial bootloader. Ensure that the selected OPP level meets the needs of the application and all thermal testing is conducted at the desired OPP level.
Voltage Domain | Clock Domain | OPP_NOM | OPP_OD | OPP_HIGH |
---|---|---|---|---|
Maximum Frequency (MHz) | Maximum Frequency (MHz) | Maximum Frequency (MHz) | ||
VD_MPU | MPU_CLK | 1000 | 1176 | 1500 |
VD_DSP | DSP_CLK | 600 | 700 | 750 |
EVE_FCLK | 535 | 650 | 650 | |
VD_IVA | IVA_GCLK | 388.3 | 430 | 532 |
VD_GPU | GPU_CLK | 425.6 | 500 | 532 |
VD_CORE | DDR3 / DDR3L | 667 (DDR3-1333) | N/A | N/A |
CORE_IPUx_CLK | 212.8 | N/A | N/A | |
L3_CLK | 266 | N/A | N/A | |
VD_RTC | RTC_FCLK | 0.034 | N/A | N/A |