SNLA267A March 2019 – June 2019 DS90UB953-Q1 , DS90UB954-Q1 , DS90UB960-Q1
This section discusses the various errors and registers used in 953 and 954 systems. Various errors will be presented and discussed using basic definitions. The various registers pertaining to the errors are found in the tables below. More information regarding these registers can be found in the data sheet.
Parity Errors: Parity errors refer to errors that occur over the forward channel. These errors are caused by irregular changes to data, as it is recorded when it is entered in memory. Note that these errors only have to do with the link between the SER and DES (found in Section 3), which means they are independent of CSI errors. Check addresses 0x55, 0x56, and 0x4D on the 954.
Cyclic Redundancy Check (CRC) Errors: CRC errors refer to errors that occur over the back channel. These errors are caused by accidental changes to the data. The redundancy in the transmitted data is checked and flagged. Note that these errors only have to do with the link between the SER and DES (found in Section 3), which means they are independent of CSI errors. Check addresses 0x4D on the 954 and 0x55 and 0x56 on the 953.
BIST CRC Errors: BIST CRC Errors refer to errors generated during the Built-In Self Test (BIST) between the 954 and 953. Note that these errors only have to do with the link between the SER and DES (found in Section 3), which means they are independent of CSI errors. For more information about BIST, refer to Section 3.2. Check addresses.
CSI Errors: CSI errors refer to errors in CSI data packets. These can be Checksum, Length, or ECC errors. CSI errors can occur across any of the links, however, they usually occur when designing the link between the DES and ISP (found in Section 5) is designed.
CSI Checksum Errors: CSI Checksum errors refer to an error detected in the packet data portion of the CSI packet.
CSI Length Errors: CSI length errors refer to an error detected in expected packet length. Packet length errors occur if the data length field in the packet header does not match the actual data length for the packet.
CSI Error Correcting Code (ECC) Errors: CSI ECC errors refer to errors in CSI data packets that are 1 or 2 bits off from their correct value. Errors that are 1 bit, are automatically corrected while errors that are 2 bits are detected but not corrected.
FPD III Encoder Error: FPD III Encoder error refers to errors in the FPD-Link III encoding that has been detected by the receiver. These are also tied to the Link error count and Link error threshold.
Buffer Error: Buffer errors refer to the overflow condition that has occurred on the packet buffer FIFO.
DEVICE | REGISTER NUMBER | REGISTER NAME | REGISTER DESCRIPTION |
---|---|---|---|
954 | 0x04 | DEVICE_STS | General flags of device status and communication between DES and SER: check sum config, power up initialization, refclk valid, pass, lock |
954 | 0x05 | PAR_ERR_THOLD_HI | Parity error threshold high byte that provides 8 most bits of threshold value. Flagged in RX_PORT_STS1 |
954 | 0x06 | PAR_ERR_THOLD_LO | Parity error threshold low byte that provides 8 most bits of threshold value. Flagged in RX_PORT_STS1 |
954 | 0x4D | RX_PORT_STS1 | Flags for various detected errors: BCC CRC error, Lock status Change, BCC sequencing error, Parity Error, Pass, and Lock |
954 | 0x4E | RX_PORT_STS2 | Flags for various detected errors: Line Length Unstable, Line Length changed, FPD3 Encoder error, packet buffer error, CSI Error, frequency stable, FPD3 CLK detect, Line count change |
954 | 0x55 | RX_PAR_ERR_HI | 8 MSBs of FPD3 Parity Errors |
954 | 0x56 | RX_PAR_ERR_LO | 8 LSBs of FPD3 Parity Errors |
954 | 0x57 | BIST_ERR_COUNT | Returns BIST error count |
954 | 0x7A | CSI_RX_STS | Has general flags for CSI errors: Packet length, check sum, 2-bit ECC, 1-bit ECC |
954 | 0x7B | CSI_ERR_COUNTER | Returns counts number of CSI packets received with errors |
954 | 0xB9 | LINK_ERROR_COUNT | Enables serial link data integrity error count, link error count threshold, and waiting for SFLITER to stabilize |
954 | 0xD0 | PORT_DEBUG | Indicates SER is in BIST mode. If not SER is not in BIST and bit [5] is high, could indicate error |
954 | 0x24 | INTERRUPT_STS | If interrupt enabled, flags when and where interrupts occurred: global interrupt, CSI Transmit port 0, RX port 1 and port 0 |
954 | 0x36-0x37 | CSI_TX_ICR, CSI_TX_ISR | Detects CSI RX errors and enables interrupts if necessary |
954 | 0xD8-0xDB | PORT_ICR_LO, PORT_ICR_HI, PORT_ISR_HI, and PORT_ISR_LO | Interrupts on various errors: see the 954 data sheet register table for more information |
DEVICE | REGISTER NUMBER | REGISTER NAME | REGISTER DESCRIPTION |
---|---|---|---|
953 | 0x49 | BC_CTRL | Back channel control used for clearing CRC and BIST errors and TX-RX link detect timer value |
953 | 0x52 | GENERAL_STS | General flags that indicate status of errors (BCC, BIST CRC, CRC, Link Lost) and communication between DES and SER |
953 | 0x54 | BIST_ERR_CN1 | 8 bits that count the CRC errors in BIST mode |
953 | 0x55 | CRC_ERR_CNT1 | CRC Error count (LSB) |
953 | 0x56 | CRC_ERR_CNT2 | CRC Error count (MSB) |
953 | 0x5C | CSI_ERR_CNT | Counts number of CSI packets received with errors since the last read of the counter |
953 | 0x5D | CSI_ERR_STATUS | Shows Line Length mismatch, Check sum error, ECC 2-bit error detected, ECC 1-bit Error Detect |
953 | 0x5E | CSI_ERR_DLANE01 | Shows errors for lanes 0 and 1: single bit error in sync, multi error in sync, control error in HS request Mode |
953 | 0x5F | CSI_ERR_DLANE23 | Shows errors for lanes 2 and 3: single bit error in sync, multi error in sync, control error in HS request Mode |
953 | 0x60 | CSI_ERR_CLK_LANE | CLK Lane: control error in HS request mode, Invalid LP state detected |
953 | 0x79 | BCC_STATUS | Error flags over BCC: master timeout, slave error, slave time out, and SER Response |
953 | 0x77 | ECC_ERR_SEL | Choose to force many different ECC errors |