SLVK099B March   2022  – September 2023 TPS7H5001-SP , TPS7H5002-SP , TPS7H5003-SP , TPS7H5004-SP

PRODUCTION DATA  

  1.   1
  2.   Abstract
  3.   Trademarks
  4. Introduction
  5. Single-Event Effects (SEE)
  6. Device and Test Board Information
  7. Irradiation Facility and Setup
  8. Depth, Range, and LETEFF Calculation
  9. Test Setup and Procedures
  10. Destructive Single-Event Effects (DSEE)
    1. 7.1 Single-Event Latch-Up (SEL) Results
    2. 7.2 Single-Event Burnout (SEB) and Single-Event Gate Rupture (SEGR) Results
  11. Single-Event Transients (SET)
    1. 8.1 System Level Implications
  12. Event Rate Calculations
  13. 10Summary
  14.   A Total Ionizing Dose from SEE Experiments
  15.   B References
  16.   C Revision History

Device and Test Board Information

The TPS7H500x-SP is packaged in a 22-pin thermally-enhanced ceramic flatpack package as shown in Figure 3-1. To see specific pinout differences between TPS7H5001/2/3/4-SP, see the TPS7H5001-SP product page. A special test board designed specifically for radiation testing was used to evaluate the performance of the TPS7H500x-SP under heavy-ions. The test board is shown in Figure 3-2. Figure 3-3 shows the board schematics.

The package was delidded to reveal the die face for all heavy-ion testing.

GUID-CED95EB9-BF9A-47FD-8B76-2F081116F6F9-low.gif Figure 3-1 Photograph of Delidded TPS7H500x-SP (Left) and Pinout Diagram (Right)
GUID-A20B5758-4E6A-46D3-99D9-66EFE4653B6A-low.gif Figure 3-2 TPS7H500x-SP SEE Test Board Top View

For 2 MHz: PS = SP = LEB = 20 kΩ and RSC = 15 kΩ.

GUID-B0B1DA18-34A8-4497-8B72-02592F76E12E-low.gif Figure 3-3 TPS7H500x-SP SEE Test Board Schematics

This EVM was used with non-production parts to validate the closed-loop performance. For further discussion, see Section 8.1.

GUID-DC981342-46A6-4A24-8F19-9ED0E05FD2E8-low.gif Figure 3-4 TPS7H5001-SP Push-Pull Closed-Loop EVM
GUID-F1678033-483C-4435-87D7-C71A5A3D2FD6-low.gif Figure 3-5 Push-Pull EVM Schematics