3 Example using TPS61096A

This chapter uses the TPS61096A as a design example to complete the circuit design with 3 V input voltage and 150 V output voltage. Figure 3-1 shows the schematic of TPS61096A with coupled transformer. VIN_S is control input signal and VIN_P is power input signal. R1 is the short circuit resistance. When R1 is short, the VIN_S and VIN_P can use the same power supply. When R1 is disconnected, the VIN_S and VIN_P can use a different power supply.

The maximum SW pin voltage of TPS61096A is 32 V. Considering the voltage spikes caused by the leakage inductance of coupled inductor and parasitic inductance, it is recommended to limit the DC voltage below 30 V. According to Equation 6, the minimum turn ratio can be calculated. V_IN=3 V, V_{OUT_P}=150, V_{OUT_S}=28 V, V_SW=30 V.

It is suggested to chose the LPR6235-253L coupled inductor, which has 10 turns ratio and 25uH L1 inductor with 1.3A saturation current. TPS61096A uses a PFM peak current control scheme in DCM mode. VOUT_S can be calculated by Equation 8.

The reverse voltage of the rectifier diode D1 is defined by Equation 10. In order to achieve the requirement, the diode BAV3004V can be used.

The maximum output current cannot be directly calculated, as TPS61096A works in PFM mode. Next is a method to determine the maximum output current. Test the waveform of the SW point, while continuously reducing the value of R_LOAD, until the waveform of the SW is continuous. At this time, the R_LOAD is maximum load of the converter, and the current is the maximum output current. The maximum output current is 1.4mA when ILIM is high logic.

Figure 3-4 shows the startup of the circuit through EN logic when VIN_S and VIN_P use same power supply. VIN_S is control input signal and VIN_P is power input signal. When EN is low, the output voltage is closed to the input voltage. When EN is high, the output voltage is smoothly ramps up to 150 V.

Figure 3-5 shows the startup of the circuit through EN logic when the VIN_S and VIN_P are different power supply. When EN is low, the output voltage is closed to the input voltage. When EN is high, the output voltage is smoothly ramps up to 150 V.

Figure 3-6 shows the stable waveform of output ripple and SW voltage when the VIN_S and VIN_P are same and R_LAOD is 1M. The output ripple is 256mV, and the voltage of SW is about 16.4 V. The converter operates at PFM mode.

Figure 3-7 shows the stable waveform of output ripple and SW voltage when the VIN_S and VIN_P are different and R_LAOD is 1M. The output ripple is 280mV, and the voltage of SW is about 15 V. The converter operates at PFM.

Table 3-1 shows the relationship between input voltage and input current without load when VIN_S and VIN_P use same power supply.

Table 3-2 shows the relationship between input voltage and input current without load when VIN_S and VIN_P use different power supply.

According to the test results in Table 3-1 and Table 3-2, when the appropriate input voltage is selected, the input current at no load can be less than 1 mA.