SLVAEL2A december   2019  – april 2023 TPS7B4250-Q1

 

  1.   Trademarks
  2. 1Overview
  3. 2Functional Safety Failure In Time (FIT) Rates
  4. 3Failure Mode Distribution (FMD)
  5. 4Pin Failure Mode Analysis (Pin FMA)
  6. 5Revision History

Pin Failure Mode Analysis (Pin FMA)

This section provides a failure mode analysis (FMA) for the pins of the TPS7B4250-Q1. The failure modes covered in this document include the typical pin-by-pin failure scenarios:

  • Pin short-circuited to ground (see Table 4-2)
  • Pin open-circuited (see Table 4-3)
  • Pin short-circuited to an adjacent pin (see Table 4-4)
  • Pin short-circuited to VIN (see Table 4-5)

Table 4-2 through Table 4-5 also indicate how these pin conditions can affect the device as per the failure effects classification in Table 4-1.

Table 4-1 TI Classification of Failure Effects
Class Failure Effects
A Potential device damage that affects functionality.
B No device damage, but loss of functionality.
C No device damage, but performance degradation.
D No device damage, no impact to functionality or performance.

Figure 4-1 shows the TPS7B4250-Q1 pin diagram. For a detailed description of the device pins, see the Pin Configuration and Functions section in the TPS7B4250-Q1 data sheet.


GUID-71E2E40F-48CC-4B97-AA68-C78477016883-low.svg

Figure 4-1 Pin Diagram
Table 4-2 Pin FMA for Device Pins Short-Circuited to Ground
Pin Name Pin No. Description of Potential Failure Effects Failure Effect Class
ADJ/EN 1 The device is disabled, resulting in no output voltage. B
GND 2 No effect. Normal operation. D
VIN 3 Power is not supplied to the device. System performance depends on upstream current limiting. B
VOUT 4 Regulation is not possible, the device operates at current limit. The device can cycle in and out of thermal shutdown. B
GND 5 No effect. Normal operation. D
Table 4-3 Pin FMA for Device Pins Open-Circuited
Pin Name Pin No. Description of Potential Failure Effects Failure Effect Class
ADJ/EN 1 VADJ/EN is undetermined; therefore, regulation is not possible. B
GND 2 The device is still functional with degraded transient performance. C
VIN 3 Power is not supplied to the device, resulting in no output voltage. B
VOUT 4 The device output is disconnected from the load. B
GND 5 The device is still functional with degraded transient performance. C
Table 4-4 Pin FMA for Device Pins Short-Circuited to Adjacent Pin
Pin Name Pin No. Shorted to Description of Potential Failure Effects Failure Effect Class
ADJ/EN 1 GND (pin 2) The device is forced off. B
GND 2 VIN (pin 3) Power is not supplied to the device. System performance depends on upstream current limiting. B
VIN 3 VOUT (pin 4) The device has protection for out to in short circuit. Potential damage when VINexceeds 22 V because this value violates the VOUT absolute maximum. B/A
VOUT 4 GND (pin 5) Regulation is not possible, the device operates at current limit. The device can cycle in and out of thermal shutdown. B
Table 4-5 Pin FMA for Device Pins Short-Circuited to VIN
Pin Name Pin No. Description of Potential Failure Effects Failure Effect Class
ADJ/EN 1 Potential damage when VIN is greater than 22 V because this value violates the absolute maximum for VADJ/EN . B/A
GND 2 Power is not supplied to the device. System performance depends on upstream current limiting. D
VIN 3 No effect. Normal operation. B
VOUT 4 The device has protection for out to in short circuit. Potential damage when VINis greater than 22 V because this value violates the absolute maximum for VOUT. B/A
GND 5 Power is not supplied to the device. System performance depends on upstream current limiting. B