SLLA498 October 2020
Figure 5-3 shows the basic topology of the three level T-Type Neutral Point Clamped (TNPC) inverter is depicted in . The TNPC inverter is an extension of the HERIC topology to suit three phase output. For 800-V DC link voltages, the high side and the low-side switch on each phase would usually be implemented with 1200-V IGBTs/MOSFETs as the full voltage has to be blocked by them. However, the bidirectional switches to the dc-link midpoint need to block only half of the voltage. It can be implemented with devices having a lower voltage rating like two 600-V IGBTs including anti-parallel diodes. Due to the reduced blocking voltage, the middle switch shows very low switching losses and acceptable conduction loss. If bipolar devices are used for the single 1200-V device, we can get reduced conduction losses, as the forward voltage drop of only one device occurs. This is in contrast to the NPC topology in which always two devices are conducting in series. The reduced conduction loss makes the TNPC an interesting choice even for low switching frequencies. As it is a three level topology, it has a good THD performance; and hence the inductor at the output can be smaller.