SLAZ271AB October 2012 – May 2021 MSP430F5327
CPU Module
Compiler-Fixed
ADDA, SUBA, CMPA [immediate],PC behave as if immediate value were offset by -2
The extended address instructions ADDA, SUBA, CMPA in immediate addressing mode are represented by 4-bytes of opcode (see the MSP430F5xx Family User's Guide MSP430F5xx Family User's Guide for more details). In cases where the program counter (PC) is used as the destination register only 2 bytes of the current instruction's 4-byte opcode are accounted for in the PC value. The resulting operation executes as if the immediate value were offset by a value of -2.
Ideal: ADDA #Immediate-4, PC
...is equivalent to...
Actual: ADDA #Immediate-2, PC
** NOTE: The MOV instruction is not affected **
1) Modify immediate value in software to account for the offset of 2.
OR
2) Use extended 20-bit instructions (addx.a, subx.a, cmpx.a).
Refer to the table below for compiler-specific fix implementation information.
IDE/Compiler | Version Number | Notes |
---|---|---|
IAR Embedded Workbench | IAR EW430 v5.30 or later | IDE-based usage enables the workaround automatically. When using the command line, user is required to add the option below: Linker: -D?CPU30_OFFSET=2 |
TI MSP430 Compiler Tools (Code Composer Studio) | v4.0 or later | |
MSP430 GNU Compiler (MSP430-GCC) | Not affected |