This evaluation board also includes the following important features:

• A single-ended transformer coupled channel allowing a bandwidth from 2 GHz to 7 GHz
• A single-ended channel with TI's high speed differential amplifier TRF1208 allowing a bandwidth from 10 MHz to 8 GHz
• The LMX2594 clock synthesizer generates the ADC sampling clock
• The LMK04828, LMK61E2 and LMX2594 onboard system clock generator generates SYSREF and FPGA reference clocks for the high-speed serial interface
• Transformer-coupled clock input network to test the ADC performance with an external low-noise clock source
• LM95233 temperature sensor
• High-speed serial data output over a High Pin Count FMC+ interface connector

• Device register programming through USB connector and FTDI USB-to-SPI bus translator

The digital data from the ADCxxDJxx00RF-TRF1208-EVM board is quickly and easily captured with the TSW14J57EVM data capture boards.

The TSW14J57EVM captures the high-speed serial data, decodes the data, stores the data in memory, and then uploads it to a connected PC through a USB interface for analysis. The High-Speed Data Converter Pro (HSDC Pro) software on the PC communicates with the hardware and processes the data.

With proper hardware selection in the HSDC Pro software, the TSW14J57 device is automatically configured to support a wide range of operating speeds of the ADCxxDJxx00RF-TRF1208-EVM, but the device may not cover the full operating range of the ADC device. Serial data rates of 15 Gbps down to 1 Gbps are supported.

This section describes how to setup the EVM on the bench with the proper equipment to evaluate the full performance of the ADC device.

The following equipment and documents are included in the EVM evaluation kit:

• Evaluation board (EVM)
• Mini-USB cable
• Power cable

The following equipment is not included in the EVM evaluation kit, but is required for evaluation of this product:

• TSW14J57EVM data capture board and related items
• High-Speed Data Converter Pro software.
• PC computer running Microsoft®Windows® 7 or 10
• Two low-noise signal generator one for DEVCLK (sampling clock) second for providing reference signal. TI recommends the following generators:
  • Rohde & Schwarz® SMA100B
  • Rohde & Schwarz® SMA100A
• One low-noise signal generator for analog input. TI recommends the following generators:
  • Rohde & Schwarz® SMA100B
  • Rohde & Schwarz® SMA100A
• Bandpass filter for analog input signal (2897 MHz or desired frequency). The following filters are recommended:
  • Bandpass filter, greater than or equal to 60 dB harmonic attenuation, less than or equal to 5% bandwidth, greater than 18 dBm power, less than 5 dB insertion loss
  • Trilithic™ 5VH-series tunable BPF
  • K&L Microwave™ BT-series tunable BPF
  • TTE KC6 or KC7-series fixed BPF
• Signal-path cables

By default, the ADCxxDJxx00RFEVM has an external clocking solution. A few small board modifications enable onboard clocking. If onboard clocking is used, the following equipment is recommended.

• One low-noise signal generators. TI recommends similar models to the analog input source.
• A bandpass filter for the analog input. TI recommends a filter similar to the analog-input path filter.
  Note:

  The frequency of clock source used to drive the external reference clock (labeled REF CLK J17) displayed on the first page of the GUI under Reference Clock. The reference clock frequency is calculated by the GUI using JMODE and the sampling frequency (Fs) entered by the user. The reference clock generator and device clock generator must be frequency-locked using a common 10 MHz reference.