SCLA021A September   2019  – April 2021 SN74HC00 , SN74HCS08-Q1

 

  1.   Trademarks
  2. 1Block Diagram
  3. 2Optimizing Communication with Wireless Interfaces
    1. 2.1 SDIO Voltage Translation
    2. 2.2 SPI Voltage Translation
  4. 3Logic and Translation Use Cases
    1. 3.1 Logic Use Cases
      1. 3.1.1 Drive Indicator LEDs
      2. 3.1.2 Power Sequencing: Combine Power-Good Signals
      3. 3.1.3 Debounce Switches and Buttons
      4. 3.1.4 Latching Alarm Circuit with Reset
      5. 3.1.5 Buffer and Driver: Condition Digital Signals
    2. 3.2 Voltage Translation Use Cases
      1. 3.2.1 SPI Communication
      2. 3.2.2 GPIO Communication
      3. 3.2.3 I2C Communication
      4. 3.2.4 I2S Communication
  5. 4Recommended Logic and Translation Families for Smart Thermostats
    1. 4.1 AUP: Advanced Ultra-Low-Power CMOS Logic and Translation
    2. 4.2 AXC: Advanced eXtremely Low-Voltage CMOS Translation
    3. 4.3 LVC: Low-Voltage CMOS Logic and Translation
  6. 5Revision History

4.1 AUP: Advanced Ultra-Low-Power CMOS Logic and Translation

Key Features: SN74AUPxGxxxx

  • Low static- and dynamic-power consumption.
  • Wide VCC operating range: 0.8 V to 3.6 V.
  • Input hysteresis allows for slow input transition rate.
  • Best in class for speed-power optimization.
  • Ioff spec for partial power down support.
  • Packaging Options:
    • DSBGA
    • SC70
    • SM8
    • SON
    • SOT-23
    • SOT
    • UQFN
    • US8
    • X2SON

Key Features: SN74AUPxTxxxx

  • Low static- and dynamic-power consumption.
  • 1.65 V to 3.6 V translation range.
  • Best in class for speed-power optimization.
  • Ioff spec for partial power down support.

See online parametric search tool to find the right AUP family logic and voltage level translation devices.