DLPT031 December   2023 DLPC910

 

  1.   1
  2.   Abstract
  3. 1Recommended Power Down Procedure
  4. 2Revision History

1 Recommended Power Down Procedure

See section 9.2 of DLPC910 datasheet.

For correct power down operation of the DMD, the following power down procedure must be executed. Prior to an anticipated power removal, assert PWR_FLOAT for a minimum of 500 μs to allow the DLPC910 to complete the power down procedure. This procedure will assure the DMD mirrors are in a flat state. Following this 500 μs time delay, power can be safely be removed from the DLP chipset.

In the event of an unanticipated power loss, the power management system must detect the input power loss, assert PWR_FLOAT to the DLPC910, and maintain all operating power levels to the DLPC910 and the DMD for a minimum of 500 μs to allow the DLPC910 to complete the power down procedure. Prior to an anticipated power removal, assert PWR_FLOAT for a minimum of 500 μs to allow the DLPC910 to complete the power down procedure.

Note: DLP® Texas Instruments is actively working on finding a solution for the DMD Mirror Float command issued by the DLPC910 Controller.