8.6.1.11 SS_EQ Register (Offset = 0x21) [reset = 0x0]
SS_EQ is shown in Table 23.
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This register controls the receiver equalization setting for the UFP (SSTX).
Table 23. SS_EQ Register Field Descriptions
Bit |
Field |
Type |
Reset |
Description |
7-4 |
RESERVED |
R |
0x0 |
Reserved
|
3-0 |
SSEQ_SEL |
RH/W |
0x0 |
This field selects EQ for USB3.1 SSTX receiver which faces the USB host. When EQ_OVERRIDE = 0b, this field reflects the sampled state of SSEQ[1:0] pins. When EQ_OVERRIDE = 1b, software can change the EQ setting for SSTXp/n pins based on value written to this field.
|