ZHCSRU8 February 2024
PRODUCTION DATA
TPSM8S6B24 devices have three internal linear regulators receiving power from AVIN and providing excellent bias (1.5V, 1.8V, and 5V) for the internal circuitry of the device. After AVIN, 1.5V, 1.8V, and 5V reach the respective UVLOs, the device initiates a power-on reset, after which the device can be communicated with through PMBus for configuration and users can store defaults to the NVM.
VDD5 has internally fixed undervoltage lockout of 3.9V (typical) to enable power-stage conversion. The VDD5 regulator can also be fed by an external supply of 4.75V to 5.25V to reduce internal power dissipation and improve efficiency by eliminating the loss in the internal LDO, or to allow operation with AVIN less than 4V. The external supply must be higher voltage than the LDO regulation voltage programmed by (B5h) USER_DATA_05 (POWER_STAGE_CONFIG).
TI does not recommend the use of the internal regulators to power other circuits because the loads placed on the regulators can adversely affect operation of the controller.