ZHCSKA4B December   2008  – September 2019 TPS737-Q1

PRODUCTION DATA.  

  1. 1 特性
  2. 2 应用
  3. 3 说明
    1.     Device Images
      1.      典型应用电路
  4. 4 修订历史记录
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagrams
    3. 7.3 Feature Description
      1. 7.3.1 Output Noise
      2. 7.3.2 Internal Current Limit
      3. 7.3.3 Enable Pin and Shutdown
      4. 7.3.4 Reverse Current
      5. 7.3.5 Thermal Protection
    4. 7.4 Device Functional Modes
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Input and Output Capacitor Requirements
        2. 8.2.2.2 Dropout Voltage
        3. 8.2.2.3 Transient Response
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
      1. 10.1.1 Improve PSRR and Noise Performance
      2. 10.1.2 Power Dissipation
    2. 10.2 Layout Example
  11. 11器件和文档支持
    1. 11.1 文档支持
      1. 11.1.1 相关文档
    2. 11.2 接收文档更新通知
    3. 11.3 社区资源
    4. 11.4 商标
    5. 11.5 静电放电警告
    6. 11.6 Glossary
  12. 12机械、封装和可订购信息
    1. 12.1 封装

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

7.3.1 Output Noise

A precision bandgap reference is used to generate the internal reference voltage (VREF). This reference is the dominant noise source within the TPS737xx-Q1 and it generates approximately 32 µVRMS (10 Hz to 100 kHz) at the reference output (NR). The regulator control loop adds gain to the reference noise with the same gain as the reference voltage, so that the noise voltage of the regulator is approximately given by Equation 1.

Equation 1. TPS737-Q1 q_vn_32_bvs123.gif

Because the value of VREF is 1.2 V, this relationship reduces to:

Equation 2. TPS737-Q1 q_vn_27_bvs123.gif

for the case of no CNR.

An internal 27-kΩ resistor in series with the noise reduction pin (NR) forms a low-pass filter for the voltage reference when an external noise reduction capacitor (CNR) is connected from NR to ground. The total noise in the 10-Hz to 100-kHz bandwidth is reduced by a factor of approximately 3.2 for CNR = 10 nF, giving the approximate relationship for CNR = 10 nF in Equation 3.

Equation 3. TPS737-Q1 q_vn_8_5vrm_bvs123.gif

This noise reduction effect is shown in Figure 18.

The TPS737xx-Q1 uses an internal charge pump to develop an internal supply voltage sufficient to drive the gate of the NMOS pass element above VOUT. The charge pump generates approximately 250 µV of switching noise at approximately 4 MHz, however, charge-pump noise contribution is negligible at the output of the regulator for most values of IOUT and COUT.