ZHCS253A September   2011  – July 2015 TPS61170-Q1

PRODUCTION DATA.  

  1. 特性
  2. 应用范围
  3. 说明
  4. 典型应用
  5. 修订历史记录
  6. Pin Configuration and Functions
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Switching Characteristics
    7. 7.7 Typical Characteristics
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Soft Start-up
      2. 8.3.2 Overcurrent Protection
      3. 8.3.3 Undervoltage Lockout
      4. 8.3.4 Thermal Shutdown
      5. 8.3.5 Enable and Shutdown
    4. 8.4 Device Functional Modes
      1. 8.4.1 PWM Program Mode
      2. 8.4.2 1-Wire Program Mode
      3. 8.4.3 EasyScale
    5. 8.5 Programming
      1. 8.5.1 Feedback Reference Program Mode Selection
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Applications
      1. 9.2.1 12-V to 24-V DC-DC Power Conversion
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
          1. 9.2.1.2.1 Program Output Voltage
          2. 9.2.1.2.2 Maximum Output Current
          3. 9.2.1.2.3 Switch Duty Cycle
          4. 9.2.1.2.4 Inductor Selection
          5. 9.2.1.2.5 Schottky Diode Selection
          6. 9.2.1.2.6 Compensation Capacitor Selection
          7. 9.2.1.2.7 Input and Output Capacitor Selection
        3. 9.2.1.3 Application Curve
      2. 9.2.2 5-V to 12-V DC-DC Power Conversion With Programmable Feedback Reference Voltage
      3. 9.2.3 12-V SEPIC (Buck-Boost) Converter
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
    3. 11.3 Thermal Considerations
  12. 12器件和文档支持
    1. 12.1 器件支持
      1. 12.1.1 Third-Party Products Disclaimer
    2. 12.2 文档支持
      1. 12.2.1 相关文档 
    3. 12.3 社区资源
    4. 12.4 商标
    5. 12.5 静电放电警告
    6. 12.6 Glossary
  13. 13机械、封装和可订购信息

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

Layout

Layout Guidelines

As for all switching power supplies, especially those switching at high frequencies and/or providing high currents, layout is an important design step. If layout is not carefully done, the regulator could suffer from instability as well as noise problems. To maximize efficiency, switch rise and fall times should be as short as possible. To reduce radiation of high-frequency switching noise and harmonics, proper layout of the high-frequency switching path is essential. Minimize the length and area of all traces connected to the SW pin and always use a ground plane under the switching regulator to minimize interplane coupling. The high current path including the switch, Schottky diode, and output capacitor, contains nanosecond rise and fall times and should be kept as short as possible. The input capacitor needs not only to be close to the VIN pin, but also to the GND pin to reduce the IC supply ripple. Figure 20 shows a sample layout.

Layout Example

TPS61170-Q1 pcb_layout_lvs789.gif Figure 20. PCB Layout Recommendation

Thermal Considerations

The maximum IC junction temperature should be restricted to 125°C under normal operating conditions. This restriction limits the power dissipation of the TPS61170-Q1. Calculate the maximum allowable dissipation, PD(max), and keep the actual dissipation less than or equal to PD(max). The maximum-power-dissipation limit is determined using Equation 14:

Equation 14. TPS61170-Q1 q8_pdm_lvs791.png

where

  • TA is the maximum ambient temperature for the application.
  • RθJA is the thermal resistance junction-to-ambient given in the Thermal Information table.

The TPS61170-Q1 comes in a thermally enhanced SON package. This package includes a thermal pad that improves the thermal capabilities of the package. The RθJA of the SON package greatly depends on the PCB layout and thermal pad connection. The thermal pad must be soldered to the analog ground on the PCB. Using thermal vias underneath the thermal pad as illustrated in the layout example. Also see the QFN/SON PCB Attachment application report (SLUA271).