ZHCSF14D March   2010  – October 2018 TPS54260

PRODUCTION DATA.  

  1. 1 特性
  2. 2 应用
  3. 3 说明
    1.     Device Images
      1.      简化原理图
      2.      效率与负载电流间的关系
  4. 4 修订历史记录
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Fixed Frequency PWM Control
      2. 7.3.2  Slope Compensation Output Current
      3. 7.3.3  Pulse-Skip Eco-Mode
      4. 7.3.4  Low-Dropout Operation and Bootstrap Voltage (BOOT)
      5. 7.3.5  Error Amplifier
      6. 7.3.6  Voltage Reference
      7. 7.3.7  Adjusting the Output Voltage
      8. 7.3.8  Enable and Adjusting Undervoltage Lockout
      9. 7.3.9  Slow-Start / Tracking Pin (SS/TR)
      10. 7.3.10 Overload Recovery Circuit
      11. 7.3.11 Sequencing
      12. 7.3.12 Constant Switching Frequency and Timing Resistor (RT/CLK Pin)
      13. 7.3.13 Overcurrent Protection and Frequency Shift
      14. 7.3.14 Selecting the Switching Frequency
      15. 7.3.15 How to Interface to RT/CLK Pin
      16. 7.3.16 Powergood (PWRGD Pin)
      17. 7.3.17 Overvoltage Transient Protection
      18. 7.3.18 Thermal Shutdown
      19. 7.3.19 Small Signal Model for Loop Response
      20. 7.3.20 Simple Small Signal Model for Peak Current Mode Control
      21. 7.3.21 Small Signal Model for Frequency Compensation
    4. 7.4 Device Functional Modes
      1. 7.4.1 Operation Near Minimum Input Voltage
      2. 7.4.2 Operation With Enable Control
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 3.3-V Output Application
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
          1. 8.2.1.2.1  Custom Design With WEBENCH® Tools
          2. 8.2.1.2.2  Selecting the Switching Frequency
          3. 8.2.1.2.3  Output Inductor Selection (LO)
          4. 8.2.1.2.4  Output Capacitor
          5. 8.2.1.2.5  Catch Diode
          6. 8.2.1.2.6  Input Capacitor
          7. 8.2.1.2.7  Slow-Start Capacitor
          8. 8.2.1.2.8  Bootstrap Capacitor Selection
          9. 8.2.1.2.9  Undervoltage Lock Out Set Point
          10. 8.2.1.2.10 Output Voltage and Feedback Resistors Selection
          11. 8.2.1.2.11 Compensation
          12. 8.2.1.2.12 Discontinuous Mode and Eco-Mode Boundary
          13. 8.2.1.2.13 Power Dissipation Estimate
        3. 8.2.1.3 Application Curves
      2. 8.2.2 Inverting Power Supply
      3. 8.2.3 Split-Rail Power Supply
      4. 8.2.4 12-V to 3.8-V GSM Power Supply
      5. 8.2.5 24-V to 4.2-V GSM Power Supply
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11器件和文档支持
    1. 11.1 器件支持
      1. 11.1.1 第三方产品免责声明
      2. 11.1.2 开发支持
        1. 11.1.2.1 使用 WEBENCH® 工具创建定制设计
    2. 11.2 接收文档更新通知
    3. 11.3 社区资源
    4. 11.4 商标
    5. 11.5 静电放电警告
    6. 11.6 术语表
  12. 12机械、封装和可订购信息

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

8.2.1.2.11 Compensation

There are several methods used to compensate DC - DC regulators. The method presented here is easy to calculate and ignores the effects of the slope compensation that is internal to the device. Since the slope compensation is ignored, the actual crossover frequency will usually be lower than the crossover frequency used in the calculations. This method assumes the crossover frequency is between the modulator pole and the esr zero and the esr zero is at least 10 times greater the modulator pole. Use SwitcherPro software for a more accurate design.

To get started, the modulator pole, fpmod, and the ESR zero, fz1 must be calculated using Equation 41 and Equation 42. For Cout, use a derated value of 40 μF. Use equations Equation 43 and Equation 44, to estimate a starting point for the crossover frequency, fco, to design the compensation. For the example design, fpmod is 1206 Hz and fzmod is 530.5 kHz. Equation 43 is the geometric mean of the modulator pole and the esr zero and Equation 44 is the mean of modulator pole and the switching frequency. Equation 43 yields 25.3 kHz and Equation 44 gives 13.4 kHz. Use the lower value of Equation 43 or Equation 44 for an initial crossover frequency. For this example, a higher fco is desired to improve transient response. the target fco is 35.0 kHz. Next, the compensation components are calculated. A resistor in series with a capacitor is used to create a compensating zero. A capacitor in parallel to these two components forms the compensating pole.

Equation 41. TPS54260 eq43_lvs795.gif
Equation 42. TPS54260 eq44_lvs795.gif
Equation 43. TPS54260 eq45_lvs919.gif
Equation 44. TPS54260 eq46_lvs919.gif

To determine the compensation resistor, R4, use Equation 45. Assume the power stage transconductance, gmps, is 10.5S. The output voltage, Vo, reference voltage, VREF, and amplifier transconductance, gmea, are 3.3V, 0.8V and 310 μS, respectively. R4 is calculated to be 20.2 kΩ, use the nearest standard value of 20.0 kΩ. Use Equation 46 to set the compensation zero to the modulator pole frequency. Equation 46 yields 4740 pF for compensating capacitor C5, a 4700-pF is used for this design.

Equation 45. TPS54260 eq48_lvs919.gif
Equation 46. TPS54260 EQ49_lvsa86.gif

A compensation pole can be implemented if desired using an additional capacitor C8 in parallel with the series combination of R4 and C5. Use the larger value of Equation 47 and Equation 48 to calculate the C8, to set the compensation pole. C8 is not used for this design example.

Equation 47. TPS54260 eq50_lvs919.gif
Equation 48. TPS54260 eq51_lvs919.gif