ZHCSE39A August   2015  – August 2015

PRODUCTION DATA.  

  1. 特性
  2. 应用
  3. 说明
  4. 修订历史记录
  5. Device Comparison Table
  6. Pin Configuration and Functions
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Timing Requirements
    7. 7.7 Typical Characteristics
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 GND
      2. 8.3.2 VIN
      3. 8.3.3 dV/dT
      4. 8.3.4 BFET
      5. 8.3.5 EN/UVLO
      6. 8.3.6 ILIM
    4. 8.4 Device Functional Modes
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Applications
      1. 9.2.1 Simple 3.7-A eFuse Protection for Set Top Boxes
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
          1. 9.2.1.2.1 Step by Step Design Procedure
          2. 9.2.1.2.2 Programming the Current-Limit Threshold: RILIM Selection
          3. 9.2.1.2.3 Undervoltage Lockout Set Point
          4. 9.2.1.2.4 Setting Output Voltage Ramp Time (TdVdT)
            1. 9.2.1.2.4.1 Case 1: Start-Up without Load: Only Output Capacitance COUT Draws Current During Start-Up
            2. 9.2.1.2.4.2 Case 2: Start-Up with Load: Output Capacitance COUT and Load Draws Current During Start-Up
          5. 9.2.1.2.5 Support Component Selection - CVIN
        3. 9.2.1.3 Application Curves
      2. 9.2.2 Inrush and Reverse Current Protection for Hold-Up Capacitor Application (for example, SSD)
        1. 9.2.2.1 Design Requirements
        2. 9.2.2.2 Detailed Design Procedure
          1. 9.2.2.2.1 Programming the Current-Limit Threshold: RILIM Selection
          2. 9.2.2.2.2 Undervoltage Lockout Set Point
          3. 9.2.2.2.3 Setting Output Voltage Ramp Time (TdVdT)
          4. 9.2.2.2.4 Support Component Selection - CVIN
        3. 9.2.2.3 Application Curves
  10. 10Power Supply Recommendations
    1. 10.1 Transient Protection
    2. 10.2 Output Short-Circuit Measurements
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12器件和文档支持
    1. 12.1 器件支持
      1. 12.1.1 Third-Party Products Disclaimer
    2. 12.2 文档支持
      1. 12.2.1 相关文档
    3. 12.3 相关链接
    4. 12.4 社区资源
    5. 12.5 商标
    6. 12.6 静电放电警告
    7. 12.7 Glossary
  13. 13机械、封装和可订购信息

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

7 Specifications

7.1 Absolute Maximum Ratings

over operating temperature range (unless otherwise noted) (1) (2)
MIN MAX UNIT
Supply voltage(1) VIN –0.3 20 V
VIN (10 ms Transient) 22
Output voltage OUT –0.3 VIN + 0.3 V
OUT (Transient < 1 µs) -1.2 V
Voltage ILIM –0.3 7 V
EN/UVLO –0.3 7
dV/dT –0.3 7
BFET –0.3 30
Storage temperature range, Tstg -65 150 °C
(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltage values, except differential voltages, are with respect to network ground terminal.

7.2 ESD Ratings

VALUE UNIT
V(ESD) Electrostatic discharge Human body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ±2000 V
Charged device model (CDM), per JEDEC specification JESD22-C101(2) ±500
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

7.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)
MIN TYP MAX UNIT
Input voltage range VIN 4.5 5 5.5 V
BFET 0 VIN+6
dV/dT, EN/UVLO 0 6
ILIM 0 3
Continuous output current IOUT 0 5 A
Resistance ILIM 10 100 162
External capacitance OUT 0.1 1 1000 µF
dV/dT 1 1000 nF
Operating junction temperature range, TJ –40 25 125 °C
Operating Ambient temperature range, TA –40 25 85 °C

7.4 Thermal Information(1)

over operating free-air temperature range (unless otherwise noted)
THERMAL METRIC TPS25923x UNIT
DRC (VSON)
10 PINS
RθJA Junction-to-ambient thermal resistance 45.9 °C/W
RθJCtop Junction-to-case (top) thermal resistance 53
RθJB Junction-to-board thermal resistance 21.2
ψJT Junction-to-top characterization parameter 1.2
ψJB Junction-to-board characterization parameter 21.4
RθJCbot Junction-to-case (bottom) thermal resistance 5.9
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report, SPRA953.

7.5 Electrical Characteristics

–40°C ≤ TJ ≤ 125°C, VIN = 5 V, VEN /UVLO = 2 V, RILIM = 100 kΩ, CdVdT = OPEN. All voltages referenced to GND (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
VIN (INPUT SUPPLY)
VUVR UVLO threshold, rising 4.15 4.3 4.45 V
VUVhyst UVLO hysteresis(1) 5%
IQON Supply current Enabled: EN/UVLO = 2 V 0.35 0.47 0.6 mA
IQOFF EN/UVLO = 0 V 0.1 0.225 mA
VOVC Over-voltage clamp VIN > 6.75 V, IOUT = 10 mA,
–40℃ ≤ TJ ≤ 85℃
5.5 6.1 6.75 V
VIN > 6.75 V, IOUT = 10 mA,
–40℃ ≤ TJ ≤ 125℃
5.25 6.1 6.75
EN/UVLO (ENABLE/UVLO INPUT)
VENR EN Threshold voltage, rising 1.37 1.4 1.44 V
VENF EN Threshold voltage, falling 1.32 1.35 1.39 V
IEN EN Input leakage current 0 V ≤ VEN ≤ 5 V –100 0 100 nA
dV/dT (OUTPUT RAMP CONTROL)
IdVdT dV/dT Charging current(1) VdVdT = 0 V 220 nA
RdVdT_disch dV/dT Discharging resistance EN/UVLO = 0 V, IdVdT = 10 mA sinking 50 75 100 Ω
VdVdTmax dV/dT Max capacitor voltage(1) 5.5 V
GAINdVdT dV/dT to OUT gain(1) ΔVdVdT 4.85 V/V
ILIM (CURRENT LIMIT PROGRAMMING)
IILIM ILIM Bias current(1) 10 µA
IOL Overload current limit(2) RILIM = 10 kΩ, VVIN-OUT = 1 V 1.02 A
RILIM = 45.3 kΩ, VVIN-OUT = 1 V 1.79 2.10 2.42
RILIM = 100 kΩ, VVIN-OUT = 1 V 3.46 3.75 4.03
RILIM = 150 kΩ, VVIN-OUT = 1 V 4.5 5.1 5.7
IOL-R-Short RILIM = 0 Ω, Shorted Resistor Current Limit (Single Point Failure Test: UL60950)(1) 0.84 A
IOL-R-Open RILIM = OPEN, Open Resistor Current Limit (Single Point Failure Test: UL60950)(1) 0.73 A
ISCL Short-circuit current limit(2) RILIM = 10 kΩ, VVIN-OUT = 5 V 1.01 A
RILIM = 45.3 kΩ, VVIN-OUT = 5 V 1.72 2.05 2.42
RILIM = 100 kΩ, VVIN-OUT = 5 V 3.14 3.56 3.98
RILIM = 150 kΩ, VVIN-OUT = 5 V 4.22 4.95 5.69
RATIOFASTRIP Fast-Trip comparator level w.r.t. overload current limit(1) IFASTRIP : IOL 160%
VOpenILIM ILIM Open resistor detect threshold(1) VILIM Rising, RILIM = OPEN 3.1 V
OUT (PASS FET OUTPUT)
RDS(on) FET ON resistance TJ = 25°C 21 28 37
T= 125°C 39 48
IOUT-OFF-LKG OUT Bias current in off state VEN/UVLO = 0 V, VOUT = 0 V (Sourcing) –5 0 1.2 µA
IOUT-OFF-SINK VEN/UVLO = 0V, VOUT = 300 mV (Sinking) 10 15 20
BFET (BLOCKING FET GATE DRIVER)
IBFET BFET Charging current(1) VBFET = VOUT 2 µA
VBFETmax BFET Clamp voltage(1) VVIN + 6.4 V
RBFETdisch BFET Discharging resistance to GND VEN/UVLO = 0 V, IBFET = 100 mA 15 26 36 Ω
TSD (THERMAL SHUT DOWN)
TSHDN TSD Threshold, rising(1) 150 °C
TSHDNhyst TSD Hysteresis(1) 10 °C
Thermal fault: latched or autoretry TPS259230 LATCHED
TPS259231 AUTO-RETRY
(1) These parameters are provided for reference only and do not constitute part of TI's published device specifications for purposes of TI's product warranty.
(2) Pulsed testing techniques used during this test maintain junction temperature approximately equal to ambient temperature.

7.6 Timing Requirements

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
TON Turn-on delay(1) EN/UVLO → H to IVIN = 100 mA, 1-A resistive load at OUT 220 µs
tOFFdly Turn off delay(1) EN↓ to BFET↓, CBFET = 0 0.4 µs
dV/dT (OUTPUT RAMP CONTROL)
tdVdT Output ramp time EN/UVLO → H to OUT = 4.9 V, CdVdT = 0 0.28 0.4 0.52 ms
EN/UVLO → H to OUT = 4.9 V,
CdVdT = 1 nF(1)
5
ILIM (CURRENT LIMIT PROGRAMMING)
tFastOffDly Fast-Trip comparator delay(1) IOUT > IFASTRIP to IOUT = 0 (Switch Off) 300 ns
BFET (BLOCKING FET GATE DRIVER)
tBFET-ON BFET Turn-On duration(1) EN/UVLO → H to VBFET = 12 V, CBFET = 1 nF 4.2 ms
EN/UVLO → H to VBFET = 12 V, CBFET = 10 nF 42
tBFET-OFF BFET Turn-Off duration(1) EN/UVLO → L to VBFET = 1 V, CBFET = 1 nF 0.4 µs
EN/UVLO → L to VBFET = 1 V, CBFET = 10 nF 1.4
THERMAL SHUT DOWN (TSD)
tTSDdly Retry Delay after TSD Recovery, TJ < [TSHDN - 10oC](1) TPS259231 Only 100 µs

7.7 Typical Characteristics

TJ = 25°C, VVIN = 5 V, VEN/UVLO = 2 V, RILIM = 100 kΩ, CVIN = 0.1 µF, COUT = 1 µF, CdVdT = OPEN (unless stated otherwise)
TPS259230 TPS259231 C001_SLVSC11.png
Figure 1. Input UVLO vs Temperature
TPS259230 TPS259231 C004_SLVSC11.png
Figure 3. IVIN-ON vs VIN
TPS259230 TPS259231 C026_SLVSC11.png
Figure 5. RDSON vs Temperature
TPS259230 TPS259231 C010_SLVSC11.png
Figure 7. IdVdT vs Temperature
TPS259230 TPS259231 C015_revB_SLVSC11.gif
Figure 9. VEN-VIH, VEN-VIL vs Temperature
TPS259230 TPS259231 C027_SLVSC11_lvscq3.gif
RILIM = 150 kΩ
Figure 11. IVOUT vs VVIN-OUT
TPS259230 TPS259231 C029_SLVSC11_lvscq3.gif
RILIM = 45.3 kΩ
Figure 13. IVOUT vs VVIN-OUT
TPS259230 TPS259231 C031_SLVSC11_CV0.gif
RILIM = 100 kΩ
Figure 15. IOL, ISC vs Temperature
TPS259230 TPS259231 D023_SLVSCV0.gif
RILIM = 0Ω
Figure 17. IOL-R-Short vs Temperature
TPS259230 TPS259231 C035_SLVSC11.png
Figure 19. VOpenILIM vs Temperature
TPS259230 TPS259231 D003_SLVSCU2.gif
Figure 21. Overload Current Limit vs RILIM Resistor
TPS259230 TPS259231 fig19_revB2_lvsc11.gif
CdVdT = OPEN, COUT = 4.7 µF
Figure 23. Transient: Output Ramp
TPS259230 TPS259231 Fig_13_slvscv0.png
EN ↓
Figure 25. Transient: Turn Off Delay
TPS259230 TPS259231 FP_Fig_26_37_slvscv0.png
RILIM = 150 kΩ
Figure 27. Transient: Output Short Circuit
TPS259230 TPS259231 Fig_28_slvscv0.png
TPS259231
Figure 29. Transient: Recovery From Short Circuit / Over Current
TPS259230 TPS259231 Fig_30_slvscv0.png
ILOAD Stepped from 65% to 125%, Back to 65%
Figure 31. Transient: Overload Current Limit
TPS259230 TPS259231 fig42_revB2_lvsc11.gif
TPS259230
Figure 33. Transient: Thermal Fault Latched
TPS259230 TPS259231 Fig_15_slvscv0.png
VIN ↓
Figure 35. Turn Off Delay to BFET
TPS259230 TPS259231 C002_SLVSC11.png
Figure 2. IQ-OFF vs VIN
TPS259230 TPS259231 C006B_SLVSC11.png
Figure 4. VOVC vs Temperature
TPS259230 TPS259231 C009B_SLVSC11.png
Figure 6. TON vs Temperature
TPS259230 TPS259231 C014_SLVSC11.png
Figure 8. TdVdT vs CdVdT
TPS259230 TPS259231 C016_SLVSC11.png
Figure 10. IEN (Leakage Current) vs VEN
TPS259230 TPS259231 C028_SLVSC11_lvscq3.gif
RILIM = 100 kΩ
Figure 12. IVOUT vs VVIN-OUT
TPS259230 TPS259231 C030_SLVSC11_CV0.gif
RILIM = 150 kΩ
Figure 14. IOL, ISC vs Temperature
TPS259230 TPS259231 C032_SLVSC11_CV0.gif
RILIM = 45.3 kΩ
Figure 16. IOL, ISC vs Temperature
TPS259230 TPS259231 D024_SLVSCV0.gif
RILIM = OPEN
Figure 18. IOL-R-Open vs Temperature
TPS259230 TPS259231 D033_SLVSCV0.gif
Figure 20. Accuracy vs Overload Current Limit
TPS259230 TPS259231 D039_SLVSCV0.gif
Figure 22. Thermal Shutdown Time vs Power Dissipation
TPS259230 TPS259231 fig20_revB2_lvsc11.gif
CdVdT = 1 nF, COUT = 10 µF, ROUT = 2.5 Ω
Figure 24. Transient: Output Ramp
TPS259230 TPS259231 fig08_revB_SLVSC11.gif
Figure 26. Transient: Over Voltage Clamp
TPS259230 TPS259231 Fig_27_slvscv0.png
RILIM = 150 kΩ
Figure 28. Short Circuit (Zoom): Fast-Trip Comparator
TPS259230 TPS259231 Fig_29_slvscv0.png
TPS259231
Figure 30. Transient: Wake Up to Short Circuit
TPS259230 TPS259231 Fig_31_slvscv0.png
TPS259231
Figure 32. Transient: Thermal Fault Auto-Retry
TPS259230 TPS259231 Fig_14_slvscv0.png
EN ↓
Figure 34. Turn Off Delay to BFET