ZHCSAA6E February   2012  – October 2015 TPD1E6B06

PRODUCTION DATA.  

  1. 特性
  2. 应用
  3. 说明
  4. 修订历史记录
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
    4. 7.4 Device Functional Modes
  8. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curves
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11器件和文档支持
    1. 11.1 社区资源
    2. 11.2 商标
    3. 11.3 静电放电警告
    4. 11.4 Glossary
  12. 12机械、封装和可订购信息

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

Application and Implementation

NOTE

Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality.

Application Information

When a system contains a human interface connector, it becomes vulnerable to large system-level ESD strikes that standard ICs cannot survive. TVS ESD protection diodes are typically used to suppress ESD at these connectors. TPD1E6B06 is a single-channel ESD protection device containing back-to-back TVS diodes, which is typically used to provide a path to ground for dissipating ESD events on bidirectional signal lines between a human interface connector and a system. As the current from an ESD event passes through the TVS diode, only a small voltage drop is present across the diode structure. This is the voltage presented to the protected IC. The low RDYN of the triggered TVS holds this voltage, VCLAMP, to a tolerable level to the protected IC.

Typical Application

TPD1E6B06 TPD1E6B06_App_Dia2.gif Figure 10. Audio Application Schematic

Design Requirements

For this design example, two TPD1E6B06s will be used to protect left and right audio channels. For this audio application, the following system parameters are known.

Table 1. Design Parameters

DESIGN PARAMETER VALUE
Audio amplifier class AB
Audio signal voltage range –3 V to 3 V
Audio frequency content 20 Hz to 20 kHz
Required IEC 61000-4-2 ESD protection ±8 kV Contact and ±15kV Air-Gap

Detailed Design Procedure

To begin the design process, some parameters must be decided upon; the designer should make sure:

  • Voltage range on the protected line must not exceed the reverse standoff voltage of the TVS diode(s) (VRWM).
  • Operating frequency is supported by the I/O capacitance CIO of the TVS diode.
  • IEC 61000-4-2 protection requirement is covered by the IEC performance of the TVS diode.

For this application, the audio signal voltage range is –3 V to 3 V. The VRWM for our TVS is –5 V to 5 V; therefore, our bidirectional TVS will not break down during normal operation, and therefore normal operation of our audio signal will not be effected due to the signal voltage range. Note that in this application, a bidirectional TVS like TPD1E6B06 is required.

Next, consider the frequency content of this audio signal. In this application with the class AB amplifier, the frequency content is from 20 Hz to 20 kHz; ensure that the TVS I/O capacitance will not distort this signal by filtering it. With TPD1E6B06 typical capacitance of 6 pF, which leads to a typical 3-dB bandwidth of 700 MHz, this diode has sufficient bandwidth to pass the audio signal without distorting it.

Finally, the human interface in this application requires standard Level 4 IEC 61000-4-2 system-level ESD protection (±8-kV Contact/ ±15-kV Air-Gap). TPD1E6B06 can survive ±15-kV Contact/ ±15-kV Air-Gap, which indicates that our device can provide sufficient protection for the interface. For any TVS diode to provide its full range of ESD protection capabilities, as well as to minimize the noise and EMI disturbances the board will undergo during ESD events, it is crucial that a system designer uses proper board layout of their TVS ESD protection diodes. For instructions on properly laying out TPD1E6B06, see Layout.

Application Curves

Figure 11 and Figure 12 are captures of the voltage clamping waveforms of TPD1E6B06 during a +8-kV Contact IEC 61000-4-2 ESD strike and a -8-kV Contact IEC 61000-4-2 ESD strike, respectively, in a typical application with proper board layout.

TPD1E6B06 D001_TPD1E6B06_Graphs.gif Figure 11. IEC 61000-4-2 ESD Clamp Voltage +8-kV Contact ESD
TPD1E6B06 D002_TPD1E6B06_Graphs.gif Figure 12. IEC 61000-4-2 ESD Clamp Voltage -8-kV Contact ESD