ZHCSDM0B October   2013  – December 2014 TLV62565 , TLV62566

PRODUCTION DATA.  

  1. 1 特性
  2. 2 应用
  3. 3 说明
  4. 4 简化电路原理图
  5. 5 修订历史记录
  6. 6 Device Comparison Table
  7. 7 Pin Configuration and Functions
  8. 8 Specifications
    1. 8.1 Absolute Maximum Ratings
    2. 8.2 ESD Ratings
    3. 8.3 Recommended Operating Conditions
    4. 8.4 Thermal Information
    5. 8.5 Electrical Characteristics
    6. 8.6 Typical Characteristics
  9. 9 Parameter Measurement Information
  10. 10Detailed Description
    1. 10.1 Overview
    2. 10.2 Functional Block Diagrams
    3. 10.3 Feature Description
      1. 10.3.1 Power Save Mode
      2. 10.3.2 Enabling/Disabling the Device
      3. 10.3.3 Soft Start
      4. 10.3.4 Switch Current Limit
      5. 10.3.5 Power Good
    4. 10.4 Device Functional Modes
      1. 10.4.1 Under Voltage Lockout
      2. 10.4.2 Thermal Shutdown
  11. 11Application and Implementation
    1. 11.1 Application Information
    2. 11.2 Typical Application
      1. 11.2.1 Design Requirements
        1. 11.2.1.1 Output Filter Design
        2. 11.2.1.2 Inductor Selection
        3. 11.2.1.3 Input and Output Capacitor Selection
      2. 11.2.2 Detailed Design Procedure
        1. 11.2.2.1 Setting the Output Voltage
        2. 11.2.2.2 Loop Stability
      3. 11.2.3 Application Performance Curves
  12. 12Power Supply Recommendations
  13. 13Layout
    1. 13.1 Layout Guidelines
    2. 13.2 Layout Example
    3. 13.3 Thermal Considerations
  14. 14器件和文档支持
    1. 14.1 器件支持
      1. 14.1.1 第三方产品免责声明
    2. 14.2 文档支持
      1. 14.2.1 相关文档
    3. 14.3 相关链接
    4. 14.4 商标
    5. 14.5 静电放电警告
    6. 14.6 术语表
  15. 15机械、封装和可订购信息

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

7 Pin Configuration and Functions

5-Pin SOT-23
DBV Package
(Top View)
TLV62565 TLV62566 TLV62565_pin_assign.gif

Pin Functions

PIN I/O/PWR DESCRIPTION
NAME NUMBER
TLV62565 TLV62566
EN 1 — I Device enable logic input. Logic HIGH enables the device, logic low disables the device and turns it into shutdown.
FB 5 5 I Feedback pin for the internal control loop. Connect this pin to the external feedback divider.
GND 2 2 PWR Ground pin.
PG — 1 O Power Good open drain output. This pin is high impedance if the output voltage is within regulation. It is pulled low if the output is below its nominal value. It is also in logic low when VIN below UVLO or thermal shutdown triggers.
SW 3 3 PWR Switch pin connected to the internal MOSFET switches and inductor terminal. Connect the inductor of the output filter to this pin.
VIN 4 4 PWR Power supply voltage input.