SLOS547A November   2008  – November 2015 THS4509-Q1

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics: VS+ - VS- = 5 V
    6. 6.6 Electrical Characteristics: VS+ - VS- = 3 V
    7. 6.7 Typical Characteristics
      1. 6.7.1 Typical Characteristics: VS+ - VS- = 5 V
      2. 6.7.2 Typical Characteristics: VS+ - VS- = 3 V
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
    4. 7.4 Device Functional Modes
  8. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Test Circuits
        1. 8.1.1.1 Frequency Response
        2. 8.1.1.2 Distortion and 1-dB Compression
        3. 8.1.1.3 S-Parameter, Slew Rate, Transient Response, Settling Time, Output Impedance, Overdrive, Output Voltage, and Turn-On and Turn-Off Time
        4. 8.1.1.4 CM Input
        5. 8.1.1.5 CMRR and PSRR
      2. 8.1.2 Differential Input to Differential Output Amplifier
      3. 8.1.3 Single-Ended Input to Differential Output Amplifier
      4. 8.1.4 Input Common-Mode Voltage Range
      5. 8.1.5 Setting the Output Common-Mode Voltage
      6. 8.1.6 Single-Supply Operation (3 V to 5 V)
    2. 8.2 Typical Applications
      1. 8.2.1 THS4509-Q1 + ADS5500-EP Combined Performance
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curves
      2. 8.2.2 THS4509-Q1 + ADS5424-SP Combined Performance
        1. 8.2.2.1 Detailed Design Procedure
        2. 8.2.2.2 Application Curve
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
      1. 10.1.1 THS4509-Q1 EVM
      2. 10.1.2 EVM Warnings and Restrictions
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Community Resources
    3. 11.3 Trademarks
    4. 11.4 Electrostatic Discharge Caution
    5. 11.5 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

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6 Specifications

6.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)(1)
MIN MAX UNIT
VS– to VS+ Supply voltage 6 V
VI Input voltage –VS +VS
VID Differential input voltage 4 V
IO Output current(2) 200 mA
Continuous power dissipation See Thermal Information
TJ Maximum junction temperature 150 °C
TA Operating free-air temperature –40 125 °C
Tstg Storage temperature –65 150 °C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) The THS4509-Q1 incorporates a (QFN) exposed thermal pad on the underside of the chip. This acts as a heatsink and must be connected to a thermally dissipative plane for proper power dissipation. Failure to do so may result in exceeding the maximum junction temperature, which could permanently damage the device. See TI technical brief SLMA002 and SLMA004 for more information about utilizing the QFN thermally enhanced package.

6.2 ESD Ratings

VALUE UNIT
V(ESD) Electrostatic discharge Human-body model (HBM), per AEC Q100-002(1) ±2000 V
Charged-device model (CDM), per AEC Q100-011 ±1500
Machine Model (MM) ±100
(1) AEC Q100-002 indicates that HBM stressing shall be in accordance with the ANSI/ESDA/JEDEC JS-001 specification.

6.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)
MIN NOM MAX UNIT
Total supply voltage 3 5 V
Operating temperature, TJ –40 25 125 °C

6.4 Thermal Information

THERMAL METRIC(1) THS4509-Q1 UNIT
RGT (QFN)
16-PIN
RθJA Junction-to-ambient thermal resistance 50.8 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 67.7 °C/W
RθJB Junction-to-board thermal resistance 24.5 °C/W
ψJT Junction-to-top characterization parameter 2 °C/W
ψJB Junction-to-board characterization parameter 24.5 °C/W
RθJC(bot) Junction-to-case (bottom) thermal resistance 8.2 °C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report, SPRA953.

6.5 Electrical Characteristics: VS+ – VS– = 5 V

test conditions (unless otherwise noted): VS+ = 2.5 V, VS– = –2.5 V, G = 10 dB, CM = open, VO = 2 Vpp, RF = 349 Ω, RL = 200 Ω differential, TA = 25°C, single-ended input, differential output, input and output referenced to mid-supply
PARAMETER TEST CONDITIONS TEST LEVEL(1) MIN TYP MAX UNIT
AC PERFORMANCE
Small-signal bandwidth G = 6 dB, VO = 100 mVpp C 2 GHz
G = 10 dB, VO = 100 mVpp 1.9
G = 14 dB, VO = 100 mVpp 600 MHz
G = 20 dB, VO = 100 mVpp 275
Gain-bandwidth product G = 20 dB 3 GHz
Bandwidth for 0.1-dB flatness G = 10 dB, VO = 2 Vpp 300 MHz
Large-signal bandwidth G = 10 dB, VO = 2 Vpp 1.5 GHz
Slew rate (differential) 2-V step 6600 V/μs
Rise time 2-V step 0.5 ns
Fall time 2-V step 0.5 ns
Settling time to 1% 2-V step 2 ns
Settling time to 0.1% 2-V step 10 ns
Second-order harmonic distortion f = 10 MHz –104 dBc
f = 50 MHz –80
f = 100 MHz –68
Third-order harmonic distortion f = 10 MHz –108 dBc
f = 50 MHz –92
f = 100 MHz –81
Second-order intermodulation distortion 200-kHz tone spacing,
RL = 499 Ω		 fC = 70 MHz –78 dBc
fC = 140 MHz –64
Third-order intermodulation distortion 200-kHz tone spacing,
RL = 499 Ω		 fC = 70 MHz –95 dBc
fC = 140 MHz –78
Second-order output intercept point 200-kHz tone spacing,
RL = 100 Ω, referenced to 50-Ω output		 fC = 70 MHz 78 dBm
fC = 140 MHz 58
Third-order output intercept point 200-kHz tone spacing,
RL = 100 Ω, referenced to 50-Ω output		 fC = 70 MHz 43 dBm
fC = 140 MHz 38
1-dB compression point fC = 70 MHz 12.2 dBm
fC = 140 MHz 10.8
Noise figure 50-Ω system, 10 MHz 17.1 dB
Input voltage noise f > 10 MHz 1.9 nV/√Hz
Input current noise f > 10 MHz 2.2 pA/√Hz
DC PERFORMANCE
Open-loop voltage gain (AOL) C 68 dB
Input offset voltage TA = 25°C A 1 4 mV
TA = –40°C to 125°C 1 5 mV
Average input offset voltage drift TA = –40°C to 125°C B 2.6 µV/°C
Input bias current TA = 25°C A 8 15.5 µA
TA = –40°C to 125°C 8 18.5
Average input bias current drift TA = –40°C to 125°C B 20 nA/°C
Input offset current TA = 25°C A 1.6 3.6 µA
TA = –40°C to 125°C 1.6 7
Average input offset current drift TA = –40°C to 125°C B 4 nA/°C
INPUT
Common-mode input range high B 1.75 V
Common-mode input range low –1.75
Common-mode rejection ratio 90 dB
Differential input impedance C 1.35 || 1.77 MΩ || pF
Common-mode input impedance C 1.02 || 2.26 MΩ || pF
OUTPUT
Maximum output voltage high Each output with 100 Ω to mid-supply TA = 25°C A 1.2 1.4 V
TA = –40°C to 125°C 1.1 1.4
Minimum output voltage low Each output with 100 Ω to mid-supply TA = 25°C –1.4 –1.2 V
TA = –40°C to 125°C –1.4 –1.1
Differential output voltage swing C 4.8 5.6 V
TA = –40°C to 125°C 4.4
Differential output current drive RL = 10 Ω 96 mA
Output balance error VO = 100 mV, f = 1 MHz –49 dB
Closed-loop output impedance f = 1 MHz 0.3 Ω
OUTPUT COMMON-MODE VOLTAGE CONTROL
Small-signal bandwidth C 700 MHz
Slew rate 110 V/μs
Gain 1 V/V
Output common-mode offset
from CM input 		1.25 V < CM < 3.5 V 5 mV
CM input bias current 1.25 V < CM < 3.5 V ±40 µA
CM input voltage range –1.5 to 1.5 V
CM input impedance 23 || 1 kΩ || pF
CM default voltage 0 V
POWER SUPPLY
Specified operating voltage C 3 5 5.25 V
Maximum quiescent current TA = 25°C A 37.7 40.9 mA
TA = –40°C to 125°C 37.7 41.9
Minimum quiescent current TA = 25°C 34.5 37.7 mA
TA = –40°C to 125°C 33.5 37.7
Power-supply rejection (±PSRR) C 90 dB
POWER DOWN Referenced to Vs–
Enable voltage threshold Assured on above 2.1 V + VS– C >2.1 + VS– V
Disable voltage threshold Assured off below 0.7 V + VS– <0.7 + VS– V
Powerdown quiescent current TA = 25°C A 0.65 0.9 mA
TA = –40°C to 125°C 0.65 1
Input bias current PD = VS– C 100 µA
Input impedance 50 || 2 kΩ || pF
Turn-on time delay Measured to output on 55 ns
Turn-off time delay Measured to output off 10 µs
(1) Test levels: A = 100% tested at 25°C, overtemperature limits by characterization and simulation; B = Limits set by characterization and simulation; C = Typical value only for information.

6.6 Electrical Characteristics: VS+ – VS– = 3 V

test conditions (unless otherwise noted): VS+ = 1.5 V, VS– = –1.5 V, G = 10 dB, CM = open, VO = 1 Vpp, RF = 349 Ω, RL = 200 Ω differential, TA = 25°C, single-ended input, differential output, input and output referenced to mid-supply
PARAMETER TEST CONDITIONS TEST LEVEL(1) MIN TYP MAX UNIT
AC PERFORMANCE
Small-signal bandwidth G = 6 dB, VO = 100 mVpp C 1.9 GHz
G = 10 dB, VO = 100 mVpp 1.6
G = 14 dB, VO = 100 mVpp 625 MHz
G = 20 dB, VO = 100 mVpp 260
Gain-bandwidth product G = 20 dB 3 GHz
Bandwidth for 0.1-dB flatness G = 10 dB, VO = 1 Vpp 400 MHz
Large-signal bandwidth G = 10 dB, VO = 1 Vpp 1.5 GHz
Slew rate (differential) 2-V step 3500 V/μs
Rise time 2-V step 0.25 ns
Fall time 2-V step 0.25 ns
Settling time to 1% 2-V step 1 ns
Settling time to 0.1% 2-V step 10 ns
Second-order harmonic distortion f = 10 MHz –107 dBc
f = 50 MHz –83
f = 100 MHz –60
Third-order harmonic distortion f = 10 MHz –87 dBc
f = 50 MHz –65
f = 100 MHz –54
Second-order intermodulation distortion 200-kHz tone spacing,
RL = 499 Ω		 fC = 70 MHz –77 dBc
fC = 140 MHz –54
Third-order intermodulation distortion 200-kHz tone spacing,
RL = 499 Ω		 fC = 70 MHz –77 dBc
fC = 140 MHz –62
Second-order output intercept point 200-kHz tone spacing
RL = 100 Ω		 fC = 70 MHz 72 dBm
fC = 140 MHz 52
Third-order output intercept point 200-kHz tone spacing
RL = 100 Ω		 fC = 70 MHz 38.5 dBm
fC = 140 MHz 30
1-dB compression point fC = 70 MHz 2.2 dBm
fC = 140 MHz 0.25
Noise figure 50-Ω system, 10 MHz 17.1 dB
Input voltage noise f > 10 MHz 1.9 nV/√Hz
Input current noise f > 10 MHz 2.2 pA/√Hz
DC PERFORMANCE
Open-loop voltage gain (AOL) C 68 dB
Input offset voltage TA = 25°C 1 mV
Average input offset voltage drift TA = –40°C to 125°C 2.6 µV/°C
Input bias current TA = 25°C 6 µA
Average input bias current drift TA = –40°C to 125°C 20 nA/°C
Input offset current TA = 25°C 1.6 µA
Average input offset current drift TA = –40°C to 125°C 4 nA/°C
INPUT
Common-mode input range high B 0.75 V
Common-mode input range low –0.75 V
Common-mode rejection ratio 80 dB
Differential input impedance C 1.35 || 1.77 MΩ || pF
Common-mode input impedance C 1.02 || 2.26 MΩ || pF
OUTPUT
Maximum output voltage high Each output with 100 Ω to mid-supply TA = 25°C C 0.45 V
Minimum output voltage low Each output with 100 Ω to mid-supply TA = 25°C –0.45 V
Differential output voltage swing 1.8 V
Differential output current drive RL = 10 Ω 50 mA
Output balance error VO = 100 mV, f = 1 MHz –49 dB
Closed-loop output impedance f = 1 MHz 0.3 Ω
OUTPUT COMMON-MODE VOLTAGE CONTROL
Small-signal bandwidth C 570 MHz
Slew rate 60 V/μs
Gain 1 V/V
Output common-mode offset
from CM input 		1.25 V < CM < 3.5 V 4 mV
CM input bias current 1.25 V < CM < 3.5 V ±40 µA
CM input voltage range –1.5 to 1.5 V
CM input impedance 20 || 1 kΩ || pF
CM default voltage 0 V
POWER SUPPLY
Specified operating voltage C 3 V
Quiescent current TA = 25°C A 34.8 mA
Power-supply rejection (±PSRR) C 70 dB
POWER DOWN Referenced to Vs–
Enable voltage threshold Assured on above 2.1 V + VS– C >2.1 + VS– V
Disable voltage threshold Assured off below 0.7 V + VS– <0.7 + VS– V
Power-down quiescent current 0.46 mA
Input bias current PD = VS– 65 µA
Input impedance 50 || 2 kΩ || pF
Turn-on time delay Measured to output on 100 ns
Turn-off time delay Measured to output off 10 µs
(1) Test levels: A = 100% tested at 25°C, overtemperature limits by characterization and simulation; B = Limits set by characterization and simulation; C = Typical value only for information.

6.7 Typical Characteristics

6.7.1 Typical Characteristics: VS+ – VS– = 5 V

test conditions (unless otherwise noted): VS+ = 2.5 V, VS– = –2.5 V, CM = open, VO = 2 Vpp, RF = 349 Ω, RL = 200 Ω differential, G = 10 dB, single-ended input, input and output referenced to midrail

Table 1. Table of Graphs VS+ – VS– = 5 V

TYPICAL CHARACTERISTIC CURVE FIGURE NO.
Small-signal frequency response Figure 1
Large-signal frequency response Figure 2
Harmonic distortion HD2, G = 6 dB, VOD = 2 VPP vs Frequency Figure 3
HD3, G = 6 dB, VOD = 2 VPP vs Frequency Figure 4
HD2, G = 10 dB, VOD = 2 VPP vs Frequency Figure 5
HD3, G = 10 dB, VOD = 2 VPP vs Frequency Figure 6
HD2, G = 14 dB, VOD = 2 VPP vs Frequency Figure 7
HD3, G = 14 dB, VOD = 2 VPP vs Frequency Figure 8
HD2, G = 10 dB vs Output voltage Figure 9
HD3, G = 10 dB vs Output voltage Figure 10
HD2, G = 10 dB vs Common-mode output voltage Figure 11
HD3, G = 10 dB vs Common-mode output voltage Figure 12
Intermodulation distortion IMD2, G = 6 dB, VOD = 2 VPP vs Frequency Figure 13
IMD3, G = 6 dB, VOD = 2 VPP vs Frequency Figure 14
IMD2, G = 10 dB, VOD = 2 VPP vs Frequency Figure 15
IMD3, G = 10 dB, VOD = 2 VPP vs Frequency Figure 16
IMD2, G = 14 dB, VOD = 2 VPP vs Frequency Figure 17
IMD3, G = 14 dB, VOD = 2 VPP vs Frequency Figure 18
Output intercept point OIP2 vs Frequency Figure 19
OIP3 vs Frequency Figure 20
0.1-dB flatness Figure 21
S-parameters vs Frequency Figure 22
Transition rate vs Output voltage Figure 23
Transient response Figure 24
Settling time Figure 25
Rejection ratio vs Frequency Figure 26
Output impedance vs Frequency Figure 27
Overdrive recovery Figure 28
Output voltage swing vs Load resistance Figure 29
Turn-off time Figure 30
Turn-on time Figure 31
Input offset voltage vs Input common-mode voltage Figure 32
Open-loop gain and phase vs Frequency Figure 33
Input referred noise vs Frequency Figure 34
Noise figure vs Frequency Figure 35
Quiescent current vs Supply voltage Figure 36
Power-supply current vs Supply voltage in power-down mode Figure 37
Output balance error vs Frequency Figure 38
CM input impedance vs Frequency Figure 39
CM small-signal frequency response Figure 40
CM input bias current vs CM input voltage Figure 41
Differential output offset voltage vs CM input voltage Figure 42
Output common-mode offset vs CM input voltage Figure 43
THS4509-Q1 ss_fr_los547.gif
Figure 1. Small-Signal Frequency Response
THS4509-Q1 sec2_hd_f_los547.gif
Figure 3. HD2 vs Frequency
THS4509-Q1 sec4_hd_f_los547.gif
Figure 5. HD2 vs Frequency
THS4509-Q1 sec6_hd_f_los547.gif
Figure 7. HD2 vs Frequency
THS4509-Q1 hd2_vout_los547.gif
Figure 9. HD2 vs Output Voltage
THS4509-Q1 HD2_v_CM_los547.gif
Figure 11. HD2 vs Common-Mode Output Voltage
THS4509-Q1 imd_2_f_los547.gif
Figure 13. IMD2 vs Frequency
THS4509-Q1 imd_4_f_los547.gif
Figure 15. IMD2 vs Frequency
THS4509-Q1 imd_6_f_los547.gif
Figure 17. IMD2 vs Frequency
THS4509-Q1 oip3_2_f_los547.gif
Figure 19. OIP2 vs Frequency
THS4509-Q1 flatness_los547.gif
Figure 21. 0.1-dB Flatness
THS4509-Q1 slew_vo_los547.gif
Figure 23. Transition Rate vs Output Voltage
THS4509-Q1 sett_t_los547.gif
Figure 25. Settling Time
THS4509-Q1 zo_f_los547.gif
Figure 27. Output Impedance vs Frequency
THS4509-Q1 vos_lr_los547.gif
Figure 29. Output Voltage Swing vs Load Resistance
THS4509-Q1 ton_t_los547.gif
Figure 31. Turnon Time
THS4509-Q1 aol_f_los547.gif
Figure 33. Open-Loop Gain and Phase vs Frequency
THS4509-Q1 nf2_f_los547.gif
Figure 35. Noise Figure vs Frequency
THS4509-Q1 psc_vs_los547.gif
Figure 37. Power-Supply Current
vs Supply Voltage in Power-Down Mode
THS4509-Q1 CM_zo_f_los547.gif
Figure 39. CM Input Impedance vs Frequency
THS4509-Q1 iib_vi_los547.gif
Figure 41. CM Input Bias Current vs CM Input Voltage
THS4509-Q1 ocm2_CM_los547.gif
Figure 43. Output Common-Mode Offset vs CM Input Voltage
THS4509-Q1 ls_fr_los547.gif
Figure 2. Large-Signal Frequency Response
THS4509-Q1 thrd2_hd_f_los547.gif
Figure 4. HD3 vs Frequency
THS4509-Q1 thrd4_hd_f_los547.gif
Figure 6. HD3 vs Frequency
THS4509-Q1 thrd6_hd_f_los547.gif
Figure 8. HD3 vs Frequency
THS4509-Q1 hd3_vout_los547.gif
Figure 10. HD3 vs Output Voltage
THS4509-Q1 HD3_v_CM_los547.gif
Figure 12. HD3 vs Common-Mode Output Voltage
THS4509-Q1 imd3_2_f_los547.gif
Figure 14. IMD3 vs Frequency
THS4509-Q1 imd3_4_f_los547.gif
Figure 16. IMD3 vs Frequency
THS4509-Q1 imd3_6_f_los547.gif
Figure 18. IMD3 vs Frequency
THS4509-Q1 oip3_3_f_los547.gif
Figure 20. OIP3 vs Frequency
THS4509-Q1 spar_f_los547.gif
Figure 22. S-Parameters vs Frequency
THS4509-Q1 trns_res_los547.gif
Figure 24. Transient Response
THS4509-Q1 rejr_f_los547.gif
Figure 26. Rejection Ratio vs Frequency
THS4509-Q1 od_rec_los547.gif
Figure 28. Overdrive Recovery
THS4509-Q1 toff_t_los547.gif
Figure 30. Turnoff Time
THS4509-Q1 vio_vicr_los547.gif
Figure 32. Input Offset Voltage
vs Input Common-Mode Voltage
THS4509-Q1 irn_f_los547.gif
Figure 34. Input Referred Noise vs Frequency
THS4509-Q1 iq_vs_los547.gif
Figure 36. Quiescent Current vs Supply Voltage
THS4509-Q1 obe_f_los547.gif
Figure 38. Output Balance Error vs Frequency
THS4509-Q1 sm_sig_res_los547.gif
Figure 40. CM Small-Signal Frequency Response
THS4509-Q1 dif_osv_v_los547.gif
Figure 42. Differential Output Offset Voltage
vs CM Input Voltage

6.7.2 Typical Characteristics: VS+ – VS– = 3 V

test conditions (unless otherwise noted): VS+ = 1.5 V, VS– = –1.5 V, CM = open, VOD = 1 Vpp, RF = 349 Ω,
RL = 200 Ω differential, G = 10 dB, single-ended input, input and output referenced to midrail

Table 2. Table of Graphs VS+ – VS– = 3 V

TYPICAL CHARACTERISTIC CURVE FIGURE NO.
Small-signal frequency response Figure 44
Large-signal frequency response Figure 45
Harmonic distortion HD2, G = 6 dB, VOD = 1 VPP vs Frequency Figure 46
HD3, G = 6 dB, VOD = 1 VPP vs Frequency Figure 47
HD2, G = 10 dB, VOD = 1 VPP vs Frequency Figure 48
HD3, G = 10 dB, VOD = 1 VPP vs Frequency Figure 49
HD2, G = 14 dB, VOD = 1 VPP vs Frequency Figure 50
HD3, G = 14 dB, VOD = 1 VPP vs Frequency Figure 51
Intermodulation distortion IMD2, G = 6 dB, VOD = 1 VPP vs Frequency Figure 52
IMD3, G = 6 dB, VOD = 1 VPP vs Frequency Figure 53
IMD2, G = 10 dB, VOD = 1 VPP vs Frequency Figure 54
IMD3, G = 10 dB, VOD = 1 VPP vs Frequency Figure 55
IMD2, G = 14 dB, VOD = 1 VPP vs Frequency Figure 56
IMD3, G = 14 dB, VOD = 1 VPP vs Frequency Figure 57
Output intercept point OIP2 vs Frequency Figure 58
OIP3 vs Frequency Figure 59
0.1-dB flatness Figure 60
S-parameters vs Frequency Figure 61
Transition rate vs Output voltage Figure 62
Transient response Figure 63
Settling time Figure 64
Output voltage swing vs Load resistance Figure 65
Rejection ratio vs Frequency Figure 66
Overdrive recovery Figure 67
Output impedance vs Frequency Figure 68
Turn-off time Figure 69
Turn-on time Figure 70
Output balance error vs Frequency Figure 71
Noise figure vs Frequency Figure 72
CM input impedance vs Frequency Figure 73
Differential output offset voltage vs CM input voltage Figure 74
Output common-mode offset vs CM input voltage Figure 75
THS4509-Q1 ss2_fr_los547.gif
Figure 44. Small-Signal Frequency Response
THS4509-Q1 sec7_hd_f_los547.gif
Figure 46. HD2 vs Frequency
THS4509-Q1 sec8_hd_f_los547.gif
Figure 48. HD2 vs Frequency
THS4509-Q1 sec9_hd_f_los547.gif
Figure 50. HD2 vs Frequency
THS4509-Q1 imd2_f_los547.gif
Figure 52. IMD2 vs Frequency
THS4509-Q1 imd22_f_los547.gif
Figure 54. IMD2 vs Frequency
THS4509-Q1 imd23_f_los547.gif
Figure 56. IMD2 vs Frequency
THS4509-Q1 oip3_f_los547.gif
Figure 58. OIP2 vs Frequency
THS4509-Q1 flatness2_los547.gif
Figure 60. 0.1-dB Flatness
THS4509-Q1 slew2_vo_los547.gif
Figure 62. Transition Rate vs Output Voltage
THS4509-Q1 sett2_t_los547.gif
Figure 64. Settling Time
THS4509-Q1 rejr2_f_los547.gif
Figure 66. Rejection Ratio vs Frequency
THS4509-Q1 zo2_f_los547.gif
Figure 68. Output Impedance vs Frequency
THS4509-Q1 ton2_t_los547.gif
Figure 70. Turn-on Time
THS4509-Q1 nf_f_los547.gif
Figure 72. Noise Figure vs Frequency
THS4509-Q1 dif2_osv_v_los547.gif
Figure 74. Differential Output Offset Voltage
vs CM Input Voltage
THS4509-Q1 is2_fr_los547.gif
Figure 45. Large-Signal Frequency Response
THS4509-Q1 thrd7_hd_f_los547.gif
Figure 47. HD3 vs Frequency
THS4509-Q1 thrd8_hd_f_los547.gif
Figure 49. HD3 vs Frequency
THS4509-Q1 thrd9_hd_f_los547.gif
Figure 51. HD3 vs Frequency
THS4509-Q1 imd3_f_los547.gif
Figure 53. IMD3 vs Frequency
THS4509-Q1 imd32_f_los547.gif
Figure 55. IMD3 vs Frequency
THS4509-Q1 imd33_f_los547.gif
Figure 57. IMD3 vs Frequency
THS4509-Q1 oip32_f_los547.gif
Figure 59. OIP3 vs Frequency
THS4509-Q1 spar2_f_los547.gif
Figure 61. S-Parameters vs Frequency
THS4509-Q1 trns2_res_los547.gif
Figure 63. Transient Response
THS4509-Q1 vos2_lr_los547.gif
Figure 65. Output Voltage Swing vs Load Resistance
THS4509-Q1 od2_rec_los547.gif
Figure 67. Overdrive Recovery
THS4509-Q1 toff2_t_los547.gif
Figure 69. Turn-off Time
THS4509-Q1 obe2_f_los547.gif
Figure 71. Output Balance Error vs Frequency
THS4509-Q1 CM2_zo_f_los547.gif
Figure 73. CM Input Impedance vs Frequency
THS4509-Q1 ocm_CM_los547.gif
Figure 75. Output Common-Mode Offset
vs CM Input Voltage