ZHCSHL7B November 2017 – November 2019 TAS5720A-Q1
PRODUCTION DATA.
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
HPF Bypass | Reserved | Digital Boost | SS/DS | Serial Audio Input Format | |||
R/W | R | R/W | R/W | R/W |
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset |
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
7 | HPF Bypass | R/W | 0 | High-Pass Filter Bypass
0: The internal high-pass filter in the digital path is not bypassed. 1: The internal high-pass filter in the digital path is bypassed. |
6 | Reserved | R | 0 | This control is reserved and must not be changed from its default setting. |
5:4 | Digital Boost | R/W | 01 | Digital Boost
00: +0 dB is added to the signal in the digital path. 01: +6 dB is added to the signal in the digital path. (Default) 10: +12 dB is added to the signal in the digital path. 11: +18 dB is added to the signal in the digital path. |
3 | SS/DS | R/W | 0 | Single Speed / Double Speed Mode Select
0: Serial Audio Port will accept single speed sample rates (that is 32 kHz, 44.1 kHz, 48 kHz) 1: Serial Audio Port will accept double speed sample rates (that is 88.2 kHz, 96 kHz) |
2:0 | Serial Audio Input Format | R/W | 100 | Serial Audio Input Format
000: Serial Audio Input Format is 24 Bits, Right Justified 001: Serial Audio Input Format is 20 Bits, Right Justified 010: Serial Audio Input Format is 18 Bits, Right Justified 011: Serial Audio Input Format is 16 Bits, Right Justified 100: Serial Audio Input Format is I²S (Default) 101: Serial Audio Input Format is 16-24 Bits, Left Justified Settings above 101 are reserved and must not be used |