11.1 Layout Guidelines
Because ESD transients have a wide frequency bandwidth from approximately 3 MHz to 3 GHz, high-frequency layout techniques must be applied during PCB design.
- Use VCC and ground planes to provide low inductance. High frequency currents follow the path of least inductance and not the path of least impedance.
- Apply 100-nF to 220-nF bypass capacitors as close as possible to the VCC pins of transceiver, UART, or controller ICs on the board.
- Use at least two vias for VCC and ground connections of bypass capacitors to minimize effective via-inductance.
- Use 1-kΩ to 10-kΩ pullup or pulldown resistors for enable lines to limit noise currents in these lines during transient events.