ZHCSSS4 august 2023 REF35-Q1
PRODUCTION DATA
- 1
- 1 特性
- 2 应用
- 3 说明
- 4 Revision History
- 5 Device Comparison
- 6 Pin Configuration and Functions
- 7 Specifications
- 8 Parameter Measurement Information
- 9 Detailed Description
- 10Application and Implementation
- 11Device and Documentation Support
- 12Mechanical, Packaging, and Orderable Information
10.3 Typical Application: Precision Power Supply and Reference
Figure 10-2 shows the basic configuration for the REF35-Q1 device as precision power supply
to ADS7038-Q1 data converter which uses its power supply AVDD as reference.
Connect bypass capacitors according to the guidelines in
REF35 超低功耗高精度电压基准
REF35-Q1 超低功耗高精度电压基准
REF35-Q1 超低功耗高精度电压基准
特性
特性
应用
应用
说明
说明
Table of Contents
Table of Contents
Revision History
Revision History
Device Comparison
Device Comparison
Pin Configuration and Functions
Pin Configuration and Functions
Specifications
Specifications
Absolute Maximum Ratings
Absolute Maximum Ratings
ESD Ratings
ESD Ratings
Recommended Operating Conditions
Recommended Operating Conditions
Thermal Information
Thermal Information
Electrical Characteristics
Electrical Characteristics
Typical Characteristics
Typical Characteristics
Parameter Measurement Information
Parameter Measurement Information
Solder Heat Shift
Solder Heat Shift
Temperature Coefficient
Temperature Coefficient
Long-Term Stability
Long-Term Stability
Thermal Hysteresis
Thermal Hysteresis
Noise Performance
Noise Performance
Low-Frequency (1/f) Noise
Low-Frequency (1/f) Noise
Broadband Noise
Broadband Noise
Power Dissipation
Power Dissipation
Detailed Description
Detailed Description
Overview
Overview
Functional Block Diagram
Functional Block Diagram
Feature Description
Feature Description
Supply Voltage
Supply Voltage
EN Pin
EN Pin
NR Pin
NR Pin
Device Functional Modes
Device Functional Modes
Basic Connections
Basic Connections
Start-Up
Start-Up
Output Transient Behavior
Output Transient Behavior
Application and Implementation
Application and Implementation
Application Information
Application Information
Typical Application: Negative Reference Voltage
Typical Application: Negative Reference Voltage
Typical Application: Precision Power Supply and Reference
Typical Application: Precision Power Supply and Reference
Design Requirements
Design Requirements
Detailed Design Procedure
Detailed Design Procedure
Selection of Reference
Selection of Reference
Input and Output Capacitors
Input and Output Capacitors
Selection of ADC
Selection of ADC
Application Curves
Application Curves
Power Supply Recommendations
Power Supply Recommendations
Layout
Layout
Layout Guidelines
Layout Guidelines
Layout Examples
Layout Examples
Device and Documentation Support
Device and Documentation Support
Documentation Support
Documentation Support
Related Documentation
Related Documentation
接收文档更新通知
接收文档更新通知
支持资源
支持资源
Trademarks
Trademarks
静电放电警告
静电放电警告
术语表
术语表
Mechanical, Packaging, and Orderable Information
Mechanical, Packaging, and Orderable Information
重要声明和免责声明
重要声明和免责声明
REF35-Q1 超低功耗高精度电压基准
REF35-Q1 超低功耗高精度电压基准
特性
A
20220803
量产数据发布
yes
具有符合 AEC-Q100 标准的下列特性：
器件温度等级 1：-40°C 至 125°C 环境工作温度范围
超低静态电流：
650nA（典型值）
初始精度：±0.05 %（最大值）
温度系数：
15ppm/°C（−40°C 至 125°C 时的最大值）
输出 1/f 噪声（0.1Hz 至 10Hz）：3.3ppmP-P
NR 引脚可降低噪声
EN 引脚可降低关断电流消耗
长期稳定性：1k 小时内为 30ppm
额定温度范围：−40°C 至 +125°C
工作温度范围：-55°C 至 +125°C
输出电流：+10mA，−5mA
输入电压：VREF + VDO 至 6V
输出电压选项：
1.2V、1.25V、1.8V、2.048V、2.5V、3.0V、3.3V、4.096V、5.0V
小型 6 引脚 SOT−23 封装
特性
A
20220803
量产数据发布
yes
A
20220803
量产数据发布
yes
A
20220803
量产数据发布
yes
A20220803量产数据发布yes
具有符合 AEC-Q100 标准的下列特性：
器件温度等级 1：-40°C 至 125°C 环境工作温度范围
超低静态电流：
650nA（典型值）
初始精度：±0.05 %（最大值）
温度系数：
15ppm/°C（−40°C 至 125°C 时的最大值）
输出 1/f 噪声（0.1Hz 至 10Hz）：3.3ppmP-P
NR 引脚可降低噪声
EN 引脚可降低关断电流消耗
长期稳定性：1k 小时内为 30ppm
额定温度范围：−40°C 至 +125°C
工作温度范围：-55°C 至 +125°C
输出电流：+10mA，−5mA
输入电压：VREF + VDO 至 6V
输出电压选项：
1.2V、1.25V、1.8V、2.048V、2.5V、3.0V、3.3V、4.096V、5.0V
小型 6 引脚 SOT−23 封装
具有符合 AEC-Q100 标准的下列特性：
器件温度等级 1：-40°C 至 125°C 环境工作温度范围
超低静态电流：
650nA（典型值）
初始精度：±0.05 %（最大值）
温度系数：
15ppm/°C（−40°C 至 125°C 时的最大值）
输出 1/f 噪声（0.1Hz 至 10Hz）：3.3ppmP-P
NR 引脚可降低噪声
EN 引脚可降低关断电流消耗
长期稳定性：1k 小时内为 30ppm
额定温度范围：−40°C 至 +125°C
工作温度范围：-55°C 至 +125°C
输出电流：+10mA，−5mA
输入电压：VREF + VDO 至 6V
输出电压选项：
1.2V、1.25V、1.8V、2.048V、2.5V、3.0V、3.3V、4.096V、5.0V
小型 6 引脚 SOT−23 封装
具有符合 AEC-Q100 标准的下列特性：
器件温度等级 1：-40°C 至 125°C 环境工作温度范围
超低静态电流：
650nA（典型值）
初始精度：±0.05 %（最大值）
温度系数：
15ppm/°C（−40°C 至 125°C 时的最大值）
输出 1/f 噪声（0.1Hz 至 10Hz）：3.3ppmP-P
NR 引脚可降低噪声
EN 引脚可降低关断电流消耗
长期稳定性：1k 小时内为 30ppm
额定温度范围：−40°C 至 +125°C
工作温度范围：-55°C 至 +125°C
输出电流：+10mA，−5mA
输入电压：VREF + VDO 至 6V
输出电压选项：
1.2V、1.25V、1.8V、2.048V、2.5V、3.0V、3.3V、4.096V、5.0V
小型 6 引脚 SOT−23 封装
具有符合 AEC-Q100 标准的下列特性：
器件温度等级 1：-40°C 至 125°C 环境工作温度范围
器件温度等级 1：-40°C 至 125°C 环境工作温度范围
器件温度等级 1：-40°C 至 125°C 环境工作温度范围超低静态电流：
650nA（典型值）
650nA（典型值）
650nA（典型值）初始精度：±0.05 %（最大值）温度系数：
15ppm/°C（−40°C 至 125°C 时的最大值）
15ppm/°C（−40°C 至 125°C 时的最大值）
15ppm/°C（−40°C 至 125°C 时的最大值）输出 1/f 噪声（0.1Hz 至 10Hz）：3.3ppmP-P
P-PNR 引脚可降低噪声EN 引脚可降低关断电流消耗长期稳定性：1k 小时内为 30ppm额定温度范围：−40°C 至 +125°C工作温度范围：-55°C 至 +125°C输出电流：+10mA，−5mA输入电压：VREF + VDO 至 6VREFDO输出电压选项：
1.2V、1.25V、1.8V、2.048V、2.5V、3.0V、3.3V、4.096V、5.0V
1.2V、1.25V、1.8V、2.048V、2.5V、3.0V、3.3V、4.096V、5.0V
1.2V、1.25V、1.8V、2.048V、2.5V、3.0V、3.3V、4.096V、5.0V小型 6 引脚 SOT−23 封装
应用
汽车前置摄像机
驾驶员监控
电池控制单元
电动动力转向
应用
汽车前置摄像机
驾驶员监控
电池控制单元
电动动力转向
汽车前置摄像机
驾驶员监控
电池控制单元
电动动力转向
汽车前置摄像机
驾驶员监控
电池控制单元
电动动力转向
汽车前置摄像机
汽车前置摄像机
驾驶员监控
驾驶员监控
电池控制单元
电池控制单元
电动动力转向
电动动力转向
说明
REF35-Q1 是毫微功耗、低漂移、高精度串联基准系列器件。REF35-Q1 系列具有 ±0.05% 的初始精度，典型功耗为 650nA。该器件的温度系数 (15ppm/ºC) 和长期稳定性（1000 小时内为 30ppm）有助于提高系统稳定性和可靠性。凭借低功耗以及高精度规格，此器件旨在用于各种各样的低电流应用。
REF35-Q1 可提供高达 10mA 电流，噪声为 3.3ppmp-p，负载调整率为 20ppm/mA。借助这一功能集，REF35-Q1 可为精密传感器和 12 至 16 位数据转换器提供强大的低噪声高精度电源。
该系列的额定工作温度范围为 -40°C 至 125°C，在 -55°C 至 125°C 温度范围内也可正常运行。
REF35-Q1 可提供宽输出电压范围（1.20V 至 5.0V），采用节省空间的 SOT23 6 引脚封装。有关可用的电压选项，请联系 TI 销售代表。
器件信息
器件型号
封装
#GUID-1669E623-F16C-47A6-AB8E-3AB271B4319D/DEVINFONOTE
封装尺寸（标称值）
REF35xxx-Q1
SOT-23 (6)
2.90mm × 1.60mm
如需了解所有可用电压选项和封装，请参阅数据表末尾的可订购产品附录。
REF35-Q1 用例
说明
REF35-Q1 是毫微功耗、低漂移、高精度串联基准系列器件。REF35-Q1 系列具有 ±0.05% 的初始精度，典型功耗为 650nA。该器件的温度系数 (15ppm/ºC) 和长期稳定性（1000 小时内为 30ppm）有助于提高系统稳定性和可靠性。凭借低功耗以及高精度规格，此器件旨在用于各种各样的低电流应用。
REF35-Q1 可提供高达 10mA 电流，噪声为 3.3ppmp-p，负载调整率为 20ppm/mA。借助这一功能集，REF35-Q1 可为精密传感器和 12 至 16 位数据转换器提供强大的低噪声高精度电源。
该系列的额定工作温度范围为 -40°C 至 125°C，在 -55°C 至 125°C 温度范围内也可正常运行。
REF35-Q1 可提供宽输出电压范围（1.20V 至 5.0V），采用节省空间的 SOT23 6 引脚封装。有关可用的电压选项，请联系 TI 销售代表。
器件信息
器件型号
封装
#GUID-1669E623-F16C-47A6-AB8E-3AB271B4319D/DEVINFONOTE
封装尺寸（标称值）
REF35xxx-Q1
SOT-23 (6)
2.90mm × 1.60mm
如需了解所有可用电压选项和封装，请参阅数据表末尾的可订购产品附录。
REF35-Q1 用例
REF35-Q1 是毫微功耗、低漂移、高精度串联基准系列器件。REF35-Q1 系列具有 ±0.05% 的初始精度，典型功耗为 650nA。该器件的温度系数 (15ppm/ºC) 和长期稳定性（1000 小时内为 30ppm）有助于提高系统稳定性和可靠性。凭借低功耗以及高精度规格，此器件旨在用于各种各样的低电流应用。
REF35-Q1 可提供高达 10mA 电流，噪声为 3.3ppmp-p，负载调整率为 20ppm/mA。借助这一功能集，REF35-Q1 可为精密传感器和 12 至 16 位数据转换器提供强大的低噪声高精度电源。
该系列的额定工作温度范围为 -40°C 至 125°C，在 -55°C 至 125°C 温度范围内也可正常运行。
REF35-Q1 可提供宽输出电压范围（1.20V 至 5.0V），采用节省空间的 SOT23 6 引脚封装。有关可用的电压选项，请联系 TI 销售代表。
器件信息
器件型号
封装
#GUID-1669E623-F16C-47A6-AB8E-3AB271B4319D/DEVINFONOTE
封装尺寸（标称值）
REF35xxx-Q1
SOT-23 (6)
2.90mm × 1.60mm
如需了解所有可用电压选项和封装，请参阅数据表末尾的可订购产品附录。
REF35-Q1 是毫微功耗、低漂移、高精度串联基准系列器件。REF35-Q1 系列具有 ±0.05% 的初始精度，典型功耗为 650nA。该器件的温度系数 (15ppm/ºC) 和长期稳定性（1000 小时内为 30ppm）有助于提高系统稳定性和可靠性。凭借低功耗以及高精度规格，此器件旨在用于各种各样的低电流应用。REF35-Q1 可提供高达 10mA 电流，噪声为 3.3ppmp-p，负载调整率为 20ppm/mA。借助这一功能集，REF35-Q1 可为精密传感器和 12 至 16 位数据转换器提供强大的低噪声高精度电源。p-p该系列的额定工作温度范围为 -40°C 至 125°C，在 -55°C 至 125°C 温度范围内也可正常运行。REF35-Q1 可提供宽输出电压范围（1.20V 至 5.0V），采用节省空间的 SOT23 6 引脚封装。有关可用的电压选项，请联系 TI 销售代表。
器件信息
器件型号
封装
#GUID-1669E623-F16C-47A6-AB8E-3AB271B4319D/DEVINFONOTE
封装尺寸（标称值）
REF35xxx-Q1
SOT-23 (6)
2.90mm × 1.60mm
器件信息
器件型号
封装
#GUID-1669E623-F16C-47A6-AB8E-3AB271B4319D/DEVINFONOTE
封装尺寸（标称值）
REF35xxx-Q1
SOT-23 (6)
2.90mm × 1.60mm
器件型号
封装
#GUID-1669E623-F16C-47A6-AB8E-3AB271B4319D/DEVINFONOTE
封装尺寸（标称值）
器件型号
封装
#GUID-1669E623-F16C-47A6-AB8E-3AB271B4319D/DEVINFONOTE
封装尺寸（标称值）
器件型号封装
#GUID-1669E623-F16C-47A6-AB8E-3AB271B4319D/DEVINFONOTE
#GUID-1669E623-F16C-47A6-AB8E-3AB271B4319D/DEVINFONOTE
#GUID-1669E623-F16C-47A6-AB8E-3AB271B4319D/DEVINFONOTE封装尺寸（标称值）
REF35xxx-Q1
SOT-23 (6)
2.90mm × 1.60mm
REF35xxx-Q1
SOT-23 (6)
2.90mm × 1.60mm
REF35xxx-Q1SOT-23 (6)2.90mm × 1.60mm
如需了解所有可用电压选项和封装，请参阅数据表末尾的可订购产品附录。
如需了解所有可用电压选项和封装，请参阅数据表末尾的可订购产品附录。
REF35-Q1 用例
REF35-Q1 用例
REF35-Q1 用例
REF35-Q1 用例
Table of Contents
Table of Contents
Revision History
DATE
REVISION
NOTES
*
Initial Release
Revision History
DATE
REVISION
NOTES
*
Initial Release
DATE
REVISION
NOTES
*
Initial Release
DATE
REVISION
NOTES
*
Initial Release
DATE
REVISION
NOTES
*
Initial Release
DATE
REVISION
NOTES
DATE
REVISION
NOTES
DATEREVISIONNOTES
*
Initial Release
*
Initial Release
*Initial Release
Device Comparison
PRODUCT
VREF
REF35120QDBVRQ1 #GUID-6D7987F6-8E28-410D-B952-8F1FBEABB179/GUID-3EEF419A-9851-43FD-A3A7-32AEA7C6401B
1.2 V
REF35125QDBVRQ1 #GUID-6D7987F6-8E28-410D-B952-8F1FBEABB179/GUID-3EEF419A-9851-43FD-A3A7-32AEA7C6401B
1.25 V
REF35180QDBVRQ1
1.8 V
REF35205QDBVRQ1 #GUID-6D7987F6-8E28-410D-B952-8F1FBEABB179/GUID-3EEF419A-9851-43FD-A3A7-32AEA7C6401B
2.048 V
REF35250QDBVRQ1 #GUID-6D7987F6-8E28-410D-B952-8F1FBEABB179/GUID-3EEF419A-9851-43FD-A3A7-32AEA7C6401B
2.5 V
REF35300QDBVRQ1
3.0 V
REF35330QDBVRQ1 #GUID-6D7987F6-8E28-410D-B952-8F1FBEABB179/GUID-3EEF419A-9851-43FD-A3A7-32AEA7C6401B
3.3 V
REF35409QDBVRQ1 #GUID-6D7987F6-8E28-410D-B952-8F1FBEABB179/GUID-3EEF419A-9851-43FD-A3A7-32AEA7C6401B
4.096 V
REF35500QDBVRQ1 #GUID-6D7987F6-8E28-410D-B952-8F1FBEABB179/GUID-3EEF419A-9851-43FD-A3A7-32AEA7C6401B
5.0 V
Product preview. Contact
local TI support for samples.
Device Comparison
PRODUCT
VREF
REF35120QDBVRQ1 #GUID-6D7987F6-8E28-410D-B952-8F1FBEABB179/GUID-3EEF419A-9851-43FD-A3A7-32AEA7C6401B
1.2 V
REF35125QDBVRQ1 #GUID-6D7987F6-8E28-410D-B952-8F1FBEABB179/GUID-3EEF419A-9851-43FD-A3A7-32AEA7C6401B
1.25 V
REF35180QDBVRQ1
1.8 V
REF35205QDBVRQ1 #GUID-6D7987F6-8E28-410D-B952-8F1FBEABB179/GUID-3EEF419A-9851-43FD-A3A7-32AEA7C6401B
2.048 V
REF35250QDBVRQ1 #GUID-6D7987F6-8E28-410D-B952-8F1FBEABB179/GUID-3EEF419A-9851-43FD-A3A7-32AEA7C6401B
2.5 V
REF35300QDBVRQ1
3.0 V
REF35330QDBVRQ1 #GUID-6D7987F6-8E28-410D-B952-8F1FBEABB179/GUID-3EEF419A-9851-43FD-A3A7-32AEA7C6401B
3.3 V
REF35409QDBVRQ1 #GUID-6D7987F6-8E28-410D-B952-8F1FBEABB179/GUID-3EEF419A-9851-43FD-A3A7-32AEA7C6401B
4.096 V
REF35500QDBVRQ1 #GUID-6D7987F6-8E28-410D-B952-8F1FBEABB179/GUID-3EEF419A-9851-43FD-A3A7-32AEA7C6401B
5.0 V
Product preview. Contact
local TI support for samples.
PRODUCT
VREF
REF35120QDBVRQ1 #GUID-6D7987F6-8E28-410D-B952-8F1FBEABB179/GUID-3EEF419A-9851-43FD-A3A7-32AEA7C6401B
1.2 V
REF35125QDBVRQ1 #GUID-6D7987F6-8E28-410D-B952-8F1FBEABB179/GUID-3EEF419A-9851-43FD-A3A7-32AEA7C6401B
1.25 V
REF35180QDBVRQ1
1.8 V
REF35205QDBVRQ1 #GUID-6D7987F6-8E28-410D-B952-8F1FBEABB179/GUID-3EEF419A-9851-43FD-A3A7-32AEA7C6401B
2.048 V
REF35250QDBVRQ1 #GUID-6D7987F6-8E28-410D-B952-8F1FBEABB179/GUID-3EEF419A-9851-43FD-A3A7-32AEA7C6401B
2.5 V
REF35300QDBVRQ1
3.0 V
REF35330QDBVRQ1 #GUID-6D7987F6-8E28-410D-B952-8F1FBEABB179/GUID-3EEF419A-9851-43FD-A3A7-32AEA7C6401B
3.3 V
REF35409QDBVRQ1 #GUID-6D7987F6-8E28-410D-B952-8F1FBEABB179/GUID-3EEF419A-9851-43FD-A3A7-32AEA7C6401B
4.096 V
REF35500QDBVRQ1 #GUID-6D7987F6-8E28-410D-B952-8F1FBEABB179/GUID-3EEF419A-9851-43FD-A3A7-32AEA7C6401B
5.0 V
Product preview. Contact
local TI support for samples.
PRODUCT
VREF
REF35120QDBVRQ1 #GUID-6D7987F6-8E28-410D-B952-8F1FBEABB179/GUID-3EEF419A-9851-43FD-A3A7-32AEA7C6401B
1.2 V
REF35125QDBVRQ1 #GUID-6D7987F6-8E28-410D-B952-8F1FBEABB179/GUID-3EEF419A-9851-43FD-A3A7-32AEA7C6401B
1.25 V
REF35180QDBVRQ1
1.8 V
REF35205QDBVRQ1 #GUID-6D7987F6-8E28-410D-B952-8F1FBEABB179/GUID-3EEF419A-9851-43FD-A3A7-32AEA7C6401B
2.048 V
REF35250QDBVRQ1 #GUID-6D7987F6-8E28-410D-B952-8F1FBEABB179/GUID-3EEF419A-9851-43FD-A3A7-32AEA7C6401B
2.5 V
REF35300QDBVRQ1
3.0 V
REF35330QDBVRQ1 #GUID-6D7987F6-8E28-410D-B952-8F1FBEABB179/GUID-3EEF419A-9851-43FD-A3A7-32AEA7C6401B
3.3 V
REF35409QDBVRQ1 #GUID-6D7987F6-8E28-410D-B952-8F1FBEABB179/GUID-3EEF419A-9851-43FD-A3A7-32AEA7C6401B
4.096 V
REF35500QDBVRQ1 #GUID-6D7987F6-8E28-410D-B952-8F1FBEABB179/GUID-3EEF419A-9851-43FD-A3A7-32AEA7C6401B
5.0 V
Product preview. Contact
local TI support for samples.
PRODUCT
VREF
REF35120QDBVRQ1 #GUID-6D7987F6-8E28-410D-B952-8F1FBEABB179/GUID-3EEF419A-9851-43FD-A3A7-32AEA7C6401B
1.2 V
REF35125QDBVRQ1 #GUID-6D7987F6-8E28-410D-B952-8F1FBEABB179/GUID-3EEF419A-9851-43FD-A3A7-32AEA7C6401B
1.25 V
REF35180QDBVRQ1
1.8 V
REF35205QDBVRQ1 #GUID-6D7987F6-8E28-410D-B952-8F1FBEABB179/GUID-3EEF419A-9851-43FD-A3A7-32AEA7C6401B
2.048 V
REF35250QDBVRQ1 #GUID-6D7987F6-8E28-410D-B952-8F1FBEABB179/GUID-3EEF419A-9851-43FD-A3A7-32AEA7C6401B
2.5 V
REF35300QDBVRQ1
3.0 V
REF35330QDBVRQ1 #GUID-6D7987F6-8E28-410D-B952-8F1FBEABB179/GUID-3EEF419A-9851-43FD-A3A7-32AEA7C6401B
3.3 V
REF35409QDBVRQ1 #GUID-6D7987F6-8E28-410D-B952-8F1FBEABB179/GUID-3EEF419A-9851-43FD-A3A7-32AEA7C6401B
4.096 V
REF35500QDBVRQ1 #GUID-6D7987F6-8E28-410D-B952-8F1FBEABB179/GUID-3EEF419A-9851-43FD-A3A7-32AEA7C6401B
5.0 V
PRODUCT
VREF
REF35120QDBVRQ1 #GUID-6D7987F6-8E28-410D-B952-8F1FBEABB179/GUID-3EEF419A-9851-43FD-A3A7-32AEA7C6401B
1.2 V
REF35125QDBVRQ1 #GUID-6D7987F6-8E28-410D-B952-8F1FBEABB179/GUID-3EEF419A-9851-43FD-A3A7-32AEA7C6401B
1.25 V
REF35180QDBVRQ1
1.8 V
REF35205QDBVRQ1 #GUID-6D7987F6-8E28-410D-B952-8F1FBEABB179/GUID-3EEF419A-9851-43FD-A3A7-32AEA7C6401B
2.048 V
REF35250QDBVRQ1 #GUID-6D7987F6-8E28-410D-B952-8F1FBEABB179/GUID-3EEF419A-9851-43FD-A3A7-32AEA7C6401B
2.5 V
REF35300QDBVRQ1
3.0 V
REF35330QDBVRQ1 #GUID-6D7987F6-8E28-410D-B952-8F1FBEABB179/GUID-3EEF419A-9851-43FD-A3A7-32AEA7C6401B
3.3 V
REF35409QDBVRQ1 #GUID-6D7987F6-8E28-410D-B952-8F1FBEABB179/GUID-3EEF419A-9851-43FD-A3A7-32AEA7C6401B
4.096 V
REF35500QDBVRQ1 #GUID-6D7987F6-8E28-410D-B952-8F1FBEABB179/GUID-3EEF419A-9851-43FD-A3A7-32AEA7C6401B
5.0 V
PRODUCT
VREF
PRODUCT
VREF
PRODUCTVREF
REF
REF35120QDBVRQ1 #GUID-6D7987F6-8E28-410D-B952-8F1FBEABB179/GUID-3EEF419A-9851-43FD-A3A7-32AEA7C6401B
1.2 V
REF35125QDBVRQ1 #GUID-6D7987F6-8E28-410D-B952-8F1FBEABB179/GUID-3EEF419A-9851-43FD-A3A7-32AEA7C6401B
1.25 V
REF35180QDBVRQ1
1.8 V
REF35205QDBVRQ1 #GUID-6D7987F6-8E28-410D-B952-8F1FBEABB179/GUID-3EEF419A-9851-43FD-A3A7-32AEA7C6401B
2.048 V
REF35250QDBVRQ1 #GUID-6D7987F6-8E28-410D-B952-8F1FBEABB179/GUID-3EEF419A-9851-43FD-A3A7-32AEA7C6401B
2.5 V
REF35300QDBVRQ1
3.0 V
REF35330QDBVRQ1 #GUID-6D7987F6-8E28-410D-B952-8F1FBEABB179/GUID-3EEF419A-9851-43FD-A3A7-32AEA7C6401B
3.3 V
REF35409QDBVRQ1 #GUID-6D7987F6-8E28-410D-B952-8F1FBEABB179/GUID-3EEF419A-9851-43FD-A3A7-32AEA7C6401B
4.096 V
REF35500QDBVRQ1 #GUID-6D7987F6-8E28-410D-B952-8F1FBEABB179/GUID-3EEF419A-9851-43FD-A3A7-32AEA7C6401B
5.0 V
REF35120QDBVRQ1 #GUID-6D7987F6-8E28-410D-B952-8F1FBEABB179/GUID-3EEF419A-9851-43FD-A3A7-32AEA7C6401B
1.2 V
REF35120QDBVRQ1 #GUID-6D7987F6-8E28-410D-B952-8F1FBEABB179/GUID-3EEF419A-9851-43FD-A3A7-32AEA7C6401B
#GUID-6D7987F6-8E28-410D-B952-8F1FBEABB179/GUID-3EEF419A-9851-43FD-A3A7-32AEA7C6401B1.2 V
REF35125QDBVRQ1 #GUID-6D7987F6-8E28-410D-B952-8F1FBEABB179/GUID-3EEF419A-9851-43FD-A3A7-32AEA7C6401B
1.25 V
REF35125QDBVRQ1 #GUID-6D7987F6-8E28-410D-B952-8F1FBEABB179/GUID-3EEF419A-9851-43FD-A3A7-32AEA7C6401B
#GUID-6D7987F6-8E28-410D-B952-8F1FBEABB179/GUID-3EEF419A-9851-43FD-A3A7-32AEA7C6401B1.25 V
REF35180QDBVRQ1
1.8 V
REF35180QDBVRQ11.8 V
REF35205QDBVRQ1 #GUID-6D7987F6-8E28-410D-B952-8F1FBEABB179/GUID-3EEF419A-9851-43FD-A3A7-32AEA7C6401B
2.048 V
REF35205QDBVRQ1 #GUID-6D7987F6-8E28-410D-B952-8F1FBEABB179/GUID-3EEF419A-9851-43FD-A3A7-32AEA7C6401B
#GUID-6D7987F6-8E28-410D-B952-8F1FBEABB179/GUID-3EEF419A-9851-43FD-A3A7-32AEA7C6401B2.048 V
REF35250QDBVRQ1 #GUID-6D7987F6-8E28-410D-B952-8F1FBEABB179/GUID-3EEF419A-9851-43FD-A3A7-32AEA7C6401B
2.5 V
REF35250QDBVRQ1 #GUID-6D7987F6-8E28-410D-B952-8F1FBEABB179/GUID-3EEF419A-9851-43FD-A3A7-32AEA7C6401B
#GUID-6D7987F6-8E28-410D-B952-8F1FBEABB179/GUID-3EEF419A-9851-43FD-A3A7-32AEA7C6401B2.5 V
REF35300QDBVRQ1
3.0 V
REF35300QDBVRQ13.0 V
REF35330QDBVRQ1 #GUID-6D7987F6-8E28-410D-B952-8F1FBEABB179/GUID-3EEF419A-9851-43FD-A3A7-32AEA7C6401B
3.3 V
REF35330QDBVRQ1 #GUID-6D7987F6-8E28-410D-B952-8F1FBEABB179/GUID-3EEF419A-9851-43FD-A3A7-32AEA7C6401B
#GUID-6D7987F6-8E28-410D-B952-8F1FBEABB179/GUID-3EEF419A-9851-43FD-A3A7-32AEA7C6401B3.3 V
REF35409QDBVRQ1 #GUID-6D7987F6-8E28-410D-B952-8F1FBEABB179/GUID-3EEF419A-9851-43FD-A3A7-32AEA7C6401B
4.096 V
REF35409QDBVRQ1 #GUID-6D7987F6-8E28-410D-B952-8F1FBEABB179/GUID-3EEF419A-9851-43FD-A3A7-32AEA7C6401B
#GUID-6D7987F6-8E28-410D-B952-8F1FBEABB179/GUID-3EEF419A-9851-43FD-A3A7-32AEA7C6401B4.096 V
REF35500QDBVRQ1 #GUID-6D7987F6-8E28-410D-B952-8F1FBEABB179/GUID-3EEF419A-9851-43FD-A3A7-32AEA7C6401B
5.0 V
REF35500QDBVRQ1 #GUID-6D7987F6-8E28-410D-B952-8F1FBEABB179/GUID-3EEF419A-9851-43FD-A3A7-32AEA7C6401B
#GUID-6D7987F6-8E28-410D-B952-8F1FBEABB179/GUID-3EEF419A-9851-43FD-A3A7-32AEA7C6401B5.0 V
Product preview. Contact
local TI support for samples.
Product preview. Contact
local TI support for samples.
Pin Configuration and Functions
Package
6-Pin
DBV
Top View
Pin Functions
PIN
TYPE
DESCRIPTION
NAME
DBV
GND
1
Ground
Device
ground connection
GND
2
Ground
Device
ground connection
EN
3
Input
Enable
connection. Enables or disables the device.
VIN
4
Power
Input
supply voltage connection
NR
5
Output
Noise
reduction pin. Connect a capacitor to reduce noise.
VREF
6
Output
Reference
voltage output
Pin Configuration and Functions
Package
6-Pin
DBV
Top View
Pin Functions
PIN
TYPE
DESCRIPTION
NAME
DBV
GND
1
Ground
Device
ground connection
GND
2
Ground
Device
ground connection
EN
3
Input
Enable
connection. Enables or disables the device.
VIN
4
Power
Input
supply voltage connection
NR
5
Output
Noise
reduction pin. Connect a capacitor to reduce noise.
VREF
6
Output
Reference
voltage output
Package
6-Pin
DBV
Top View
Pin Functions
PIN
TYPE
DESCRIPTION
NAME
DBV
GND
1
Ground
Device
ground connection
GND
2
Ground
Device
ground connection
EN
3
Input
Enable
connection. Enables or disables the device.
VIN
4
Power
Input
supply voltage connection
NR
5
Output
Noise
reduction pin. Connect a capacitor to reduce noise.
VREF
6
Output
Reference
voltage output
Package
6-Pin
DBV
Top View
Package
6-Pin
DBV
Top View
Package6-Pin
DBVTop View
Pin Functions
PIN
TYPE
DESCRIPTION
NAME
DBV
GND
1
Ground
Device
ground connection
GND
2
Ground
Device
ground connection
EN
3
Input
Enable
connection. Enables or disables the device.
VIN
4
Power
Input
supply voltage connection
NR
5
Output
Noise
reduction pin. Connect a capacitor to reduce noise.
VREF
6
Output
Reference
voltage output
Pin Functions
PIN
TYPE
DESCRIPTION
NAME
DBV
GND
1
Ground
Device
ground connection
GND
2
Ground
Device
ground connection
EN
3
Input
Enable
connection. Enables or disables the device.
VIN
4
Power
Input
supply voltage connection
NR
5
Output
Noise
reduction pin. Connect a capacitor to reduce noise.
VREF
6
Output
Reference
voltage output
PIN
TYPE
DESCRIPTION
NAME
DBV
PIN
TYPE
DESCRIPTION
PINTYPEDESCRIPTION
NAME
DBV
NAMEDBV
GND
1
Ground
Device
ground connection
GND
2
Ground
Device
ground connection
EN
3
Input
Enable
connection. Enables or disables the device.
VIN
4
Power
Input
supply voltage connection
NR
5
Output
Noise
reduction pin. Connect a capacitor to reduce noise.
VREF
6
Output
Reference
voltage output
GND
1
Ground
Device
ground connection
GND1GroundDevice
ground connection
GND
2
Ground
Device
ground connection
GND2GroundDevice
ground connection
EN
3
Input
Enable
connection. Enables or disables the device.
EN3InputEnable
connection. Enables or disables the device.
VIN
4
Power
Input
supply voltage connection
VIN4PowerInput
supply voltage connection
NR
5
Output
Noise
reduction pin. Connect a capacitor to reduce noise.
NR5OutputNoise
reduction pin. Connect a capacitor to reduce noise.
VREF
6
Output
Reference
voltage output
VREF6OutputReference
voltage output
Specifications
Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted) (1)
MIN
MAX
UNIT
Input voltage
VIN
–0.3
6.5
V
Enable voltage
EN
–0.3
VIN + 0.3 (2)
V
Output voltage
VREF
–0.3
VIN + 0.3 (2)
V
Output short circuit current
ISC
20
mA
Operating temperature range
TA
–55
125
°C
Storage temperature range
Tstg
–65
170
°C
Operation outside the Absolute Maximum Ratings may cause permanent device damage. Absolute Maximum Ratings do not imply functional operation of the device at these or any other conditions beyond those listed under Recommended Operating Conditions. If used outside the Recommended Operating Conditions but within the Absolute Maximum Ratings, the device may not be fully functional, and this may affect device reliability, functionality, performance, and shorten the device lifetime.
IN + 0.3 V or 6.5 V, whichever is lower
ESD Ratings
VALUE
UNIT
V(ESD)
Electrostatic discharge
Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins (1)
±2000
V
Charged device model (CDM), per ANSI/ESDA/JEDEC JS-002, all pins (2)
±750
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
MIN
NOM
MAX
UNIT
VIN
Input voltage #GUID-XXXXXXXX-SF0T-XXXX-XXXX-000000306146/SF4EREZI70TF
VREF + VDO
(2)
6
V
EN
Enable voltage
0
VIN
V
IL
Output current
–5
10
mA
TA
Operating temperature
–40
25
125
°C
For VREF = 1.2 V and 1.25 V, minimum VIN = 1.7 V
VDO = Dropout voltage
Thermal Information
THERMAL METRIC#GUID-XXXXXXXX-SF0T-XXXX-XXXX-000000306148/A_1498070457_THERMAL_1PKG_FOOTER1
REF35-Q1
UNIT
DBV (SOT-23)
6 PINS
RθJA
Junction-to-ambient thermal resistance
164.4
°C/W
RθJC(top)
Junction-to-case (top) thermal resistance
102.5
°C/W
RθJB
Junction-to-board thermal resistance
59.6
°C/W
ΨJT
Junction-to-top characterization parameter
44.0
°C/W
ΨJB
Junction-to-board characterization parameter
59.4
°C/W
RθJC(bot)
Junction-to-case (bottom) thermal resistance
N/A
°C/W
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report.
Electrical Characteristics
At VIN = VREF + 0.5 V, VEN = VIN, CL = 10 µF, CIN = 0.1 µF, IL = 0 mA, minimum and maximum specifications at TA = –40℃ to 125℃, typical specifications TA = 25℃; unless otherwise noted
PARAMETER
TEST CONDITION
MIN
TYP
MAX
UNIT
ACCURACY AND DRIFT
Output voltage accuracy
TA = 25℃
–0.05
0.05
%
Output voltage temperature coefficient
–40℃ ≤ TA ≤ 125℃
15
ppm/℃
LINE AND LOAD REGULATION
ΔVREF/ΔVIN
Line regulation
VREF < 2.5 V; VIN = VREF + VDO to VINMAX
40
160
ppm/V
VREF ≥ 2.5 V; VIN = VREF + VDO to VINMAX
40
120
ppm/V
ΔVREF/ΔIL
Load regulation
IL = 0 mA to 10 mA,VIN = VREF + VDO
Source
20
60
ppm/mA
IL = 0 mA to 5 mA,VIN = VREF + VDO
Sink
40
350
ppm/mA
POWER SUPPLY
VIN
Input voltage #GUID-XXXXXXXX-SF0T-XXXX-XXXX-000000306155/SF4MV7HJTUCF
VREF + VDO
6
V
IQ
Quiescent current
Active mode
TA = 25℃
0.65
0.9
µA
–40℃ ≤ TA ≤ 125℃
2.6
Shutdown mode
TA = 25℃
0.1
–40℃ ≤ TA ≤ 125℃
0.5
VEN
Enable pin voltage
Active mode (EN = 1 or Float)
0.7 x VIN
V
Shutdown mode (EN = 0)
0.3 x VIN
IEN
Enable pin current
VEN = VIN
0.05
0.1
uA
VDO
Dropout voltage
IL = 5 mA
120
mV
IL = 10 mA
250
ISC
Short circuit current, Sourcing
VREF = 0 V, TA = 25℃
33
mA
ISC
Short circuit current, Sinking
VREF = VIN V, TA = 25℃
21
mA
TURN-ON TIME
tON
Turn-on time (2)
0.1% settling, CL = 1 µF, VREF = 2.5 V
2
ms
NOISE
en
Output voltage noise
ƒ = 10 Hz to 1 kHz, CL = 1 µF
0.7
ppmrms
enp-p
Low-frequency noise
ƒ = 0.1 Hz to 10 Hz, VREF ≥ 2.5 V
3.8
ppmp-p
ƒ = 0.1 Hz to 10 Hz, VREF < 2.5 V
3.3
ppmp-p
HYSTERESIS AND LONG-TERM STABILITY
Long-term stability
0 to 1000h at 35°C
30
ppm
Output voltage hysteresis
25°C, –40°C, 125°C, 25°C (cycle 1)
90
ppm
Output voltage hysteresis
25°C, –40°C, 125°C, 25°C (cycle 2)
70
ppm
STABLE CAPACITANCE RANGE
Input capacitor range
0.1
µF
Output capacitor range #GUID-XXXXXXXX-SF0T-XXXX-XXXX-000000306155/SFLSHY1OMVVI
0.1
10
µF
For VREF = 1.2 V and 1.25 V, minimum VIN = 1.7 V
Scales linearly with VREF.
ESR for the capacitor <= 400 mΩ
Typical Characteristics
at TA = 25°C, VIN =
VEN = VREF + 0.3 V, IL = 0 mA, CL = 10 µF,
CIN = 0.1 µF (unless otherwise noted)
Output Voltage
Drift vs Free-Air Temperature
Initial
Accuracy Distribution
0.1 Hz to 10 Hz
Noise Distribution
(VREF = 1.25 V,
CNR = Open, IL = 0 mA)
0.1 Hz to 10 Hz Noise Distribution
(VREF = 2.5 V, CNR = Open,
IL = 0 mA)
0.1 Hz to 10 Hz Noise Distribution
(VREF = 2.5 V, CL = 1 μF,
CNR = Open)
0.1 Hz to 10 Hz Noise Distribution
(VREF = 2.5 V, CL = 1 μF,
IL = 0 mA)
0.1 Hz to 10 Hz Noise Distribution
(VREF = 5 V, CNR = Open,
IL = 0 mA)
Noise Density vs Frequency
(VREF = 1.25 V, IL = 0 mA)
Noise Density vs Frequency
(VREF = 2.5 V, IL = 0 mA)
Noise Density vs Frequency
(VREF = 5 V, IL = 0 mA)
Load Regulation
(Sourcing 10 mA) vs Free-Air Temperature
Load Regulation
(Sinking 5 mA) vs Free-Air Temperature
Load Transient Response
(VREF = 2.5 V, CL = 10 μF)
Load Transient Response
(VREF = 2.5 V, CL = 10 μF)
Load Transient Response
(VREF = 2.5 V, CL = 1 μF)
Load Transient Response
(VREF = 2.5 V, CL = 1 μF)
Load Transient Response
(VREF = 1.25 V, CL = 1 μF)
Load Transient Response
(VREF = 1.25 V, CL = 1 μF)
Line Regulation
vs Free-Air Temperature
Line Transient Response
(VREF = 1.25 V, CL = 1 μF)
Line Transient Response
(VREF = 2.5 V, CL = 1 μF)
Power Supply Rejection Ratio
(VREF = 2.5 V, IL = 0 mA)
Output
Impedance
Quiescent
Current vs Free-Air Temperature
Dropout Voltage
vs Free-Air Temperature
Solder Heat
Shift Distribution
Long Term
Stability - 1000 hours (VREF)
Specifications
Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted) (1)
MIN
MAX
UNIT
Input voltage
VIN
–0.3
6.5
V
Enable voltage
EN
–0.3
VIN + 0.3 (2)
V
Output voltage
VREF
–0.3
VIN + 0.3 (2)
V
Output short circuit current
ISC
20
mA
Operating temperature range
TA
–55
125
°C
Storage temperature range
Tstg
–65
170
°C
Operation outside the Absolute Maximum Ratings may cause permanent device damage. Absolute Maximum Ratings do not imply functional operation of the device at these or any other conditions beyond those listed under Recommended Operating Conditions. If used outside the Recommended Operating Conditions but within the Absolute Maximum Ratings, the device may not be fully functional, and this may affect device reliability, functionality, performance, and shorten the device lifetime.
IN + 0.3 V or 6.5 V, whichever is lower
Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted) (1)
MIN
MAX
UNIT
Input voltage
VIN
–0.3
6.5
V
Enable voltage
EN
–0.3
VIN + 0.3 (2)
V
Output voltage
VREF
–0.3
VIN + 0.3 (2)
V
Output short circuit current
ISC
20
mA
Operating temperature range
TA
–55
125
°C
Storage temperature range
Tstg
–65
170
°C
Operation outside the Absolute Maximum Ratings may cause permanent device damage. Absolute Maximum Ratings do not imply functional operation of the device at these or any other conditions beyond those listed under Recommended Operating Conditions. If used outside the Recommended Operating Conditions but within the Absolute Maximum Ratings, the device may not be fully functional, and this may affect device reliability, functionality, performance, and shorten the device lifetime.
IN + 0.3 V or 6.5 V, whichever is lower
over operating free-air temperature range (unless otherwise noted) (1)
MIN
MAX
UNIT
Input voltage
VIN
–0.3
6.5
V
Enable voltage
EN
–0.3
VIN + 0.3 (2)
V
Output voltage
VREF
–0.3
VIN + 0.3 (2)
V
Output short circuit current
ISC
20
mA
Operating temperature range
TA
–55
125
°C
Storage temperature range
Tstg
–65
170
°C
over operating free-air temperature range (unless otherwise noted) (1)
(1)
MIN
MAX
UNIT
Input voltage
VIN
–0.3
6.5
V
Enable voltage
EN
–0.3
VIN + 0.3 (2)
V
Output voltage
VREF
–0.3
VIN + 0.3 (2)
V
Output short circuit current
ISC
20
mA
Operating temperature range
TA
–55
125
°C
Storage temperature range
Tstg
–65
170
°C
MIN
MAX
UNIT
MIN
MAX
UNIT
MINMAXUNIT
Input voltage
VIN
–0.3
6.5
V
Enable voltage
EN
–0.3
VIN + 0.3 (2)
V
Output voltage
VREF
–0.3
VIN + 0.3 (2)
V
Output short circuit current
ISC
20
mA
Operating temperature range
TA
–55
125
°C
Storage temperature range
Tstg
–65
170
°C
Input voltage
VIN
–0.3
6.5
V
Input voltageVIN–0.36.5V
Enable voltage
EN
–0.3
VIN + 0.3 (2)
V
Enable voltageEN–0.3VIN + 0.3 (2)
(2)V
Output voltage
VREF
–0.3
VIN + 0.3 (2)
V
Output voltageVREF–0.3VIN + 0.3 (2)
(2)V
Output short circuit current
ISC
20
mA
Output short circuit currentISC
SC20mA
Operating temperature range
TA
–55
125
°C
Operating temperature rangeTA
A–55125°C
Storage temperature range
Tstg
–65
170
°C
Storage temperature rangeTstg
stg–65170°C
Operation outside the Absolute Maximum Ratings may cause permanent device damage. Absolute Maximum Ratings do not imply functional operation of the device at these or any other conditions beyond those listed under Recommended Operating Conditions. If used outside the Recommended Operating Conditions but within the Absolute Maximum Ratings, the device may not be fully functional, and this may affect device reliability, functionality, performance, and shorten the device lifetime.
IN + 0.3 V or 6.5 V, whichever is lower
Operation outside the Absolute Maximum Ratings may cause permanent device damage. Absolute Maximum Ratings do not imply functional operation of the device at these or any other conditions beyond those listed under Recommended Operating Conditions. If used outside the Recommended Operating Conditions but within the Absolute Maximum Ratings, the device may not be fully functional, and this may affect device reliability, functionality, performance, and shorten the device lifetime.IN + 0.3 V or 6.5 V, whichever is lower
ESD Ratings
VALUE
UNIT
V(ESD)
Electrostatic discharge
Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins (1)
±2000
V
Charged device model (CDM), per ANSI/ESDA/JEDEC JS-002, all pins (2)
±750
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
ESD Ratings
VALUE
UNIT
V(ESD)
Electrostatic discharge
Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins (1)
±2000
V
Charged device model (CDM), per ANSI/ESDA/JEDEC JS-002, all pins (2)
±750
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
VALUE
UNIT
V(ESD)
Electrostatic discharge
Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins (1)
±2000
V
Charged device model (CDM), per ANSI/ESDA/JEDEC JS-002, all pins (2)
±750
VALUE
UNIT
V(ESD)
Electrostatic discharge
Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins (1)
±2000
V
Charged device model (CDM), per ANSI/ESDA/JEDEC JS-002, all pins (2)
±750
VALUE
UNIT
VALUE
UNIT
VALUEUNIT
V(ESD)
Electrostatic discharge
Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins (1)
±2000
V
Charged device model (CDM), per ANSI/ESDA/JEDEC JS-002, all pins (2)
±750
V(ESD)
Electrostatic discharge
Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins (1)
±2000
V
V(ESD)
(ESD)Electrostatic dischargeHuman body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins (1)
(1)±2000V
Charged device model (CDM), per ANSI/ESDA/JEDEC JS-002, all pins (2)
±750
Charged device model (CDM), per ANSI/ESDA/JEDEC JS-002, all pins (2)
(2)±750
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
MIN
NOM
MAX
UNIT
VIN
Input voltage #GUID-XXXXXXXX-SF0T-XXXX-XXXX-000000306146/SF4EREZI70TF
VREF + VDO
(2)
6
V
EN
Enable voltage
0
VIN
V
IL
Output current
–5
10
mA
TA
Operating temperature
–40
25
125
°C
For VREF = 1.2 V and 1.25 V, minimum VIN = 1.7 V
VDO = Dropout voltage
Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
MIN
NOM
MAX
UNIT
VIN
Input voltage #GUID-XXXXXXXX-SF0T-XXXX-XXXX-000000306146/SF4EREZI70TF
VREF + VDO
(2)
6
V
EN
Enable voltage
0
VIN
V
IL
Output current
–5
10
mA
TA
Operating temperature
–40
25
125
°C
For VREF = 1.2 V and 1.25 V, minimum VIN = 1.7 V
VDO = Dropout voltage
over operating free-air temperature range (unless otherwise noted)
MIN
NOM
MAX
UNIT
VIN
Input voltage #GUID-XXXXXXXX-SF0T-XXXX-XXXX-000000306146/SF4EREZI70TF
VREF + VDO
(2)
6
V
EN
Enable voltage
0
VIN
V
IL
Output current
–5
10
mA
TA
Operating temperature
–40
25
125
°C
over operating free-air temperature range (unless otherwise noted)
MIN
NOM
MAX
UNIT
VIN
Input voltage #GUID-XXXXXXXX-SF0T-XXXX-XXXX-000000306146/SF4EREZI70TF
VREF + VDO
(2)
6
V
EN
Enable voltage
0
VIN
V
IL
Output current
–5
10
mA
TA
Operating temperature
–40
25
125
°C
MIN
NOM
MAX
UNIT
MIN
NOM
MAX
UNIT
MINNOMMAXUNIT
VIN
Input voltage #GUID-XXXXXXXX-SF0T-XXXX-XXXX-000000306146/SF4EREZI70TF
VREF + VDO
(2)
6
V
EN
Enable voltage
0
VIN
V
IL
Output current
–5
10
mA
TA
Operating temperature
–40
25
125
°C
VIN
Input voltage #GUID-XXXXXXXX-SF0T-XXXX-XXXX-000000306146/SF4EREZI70TF
VREF + VDO
(2)
6
V
VINInput voltage #GUID-XXXXXXXX-SF0T-XXXX-XXXX-000000306146/SF4EREZI70TF
#GUID-XXXXXXXX-SF0T-XXXX-XXXX-000000306146/SF4EREZI70TFVREF + VDO
(2)
DO (2)6V
EN
Enable voltage
0
VIN
V
ENEnable voltage0VINV
IL
Output current
–5
10
mA
IL
LOutput current–510mA
TA
Operating temperature
–40
25
125
°C
TA
AOperating temperature–4025125°C
For VREF = 1.2 V and 1.25 V, minimum VIN = 1.7 V
VDO = Dropout voltage
For VREF = 1.2 V and 1.25 V, minimum VIN = 1.7 VREFINVDO = Dropout voltageDO
Thermal Information
THERMAL METRIC#GUID-XXXXXXXX-SF0T-XXXX-XXXX-000000306148/A_1498070457_THERMAL_1PKG_FOOTER1
REF35-Q1
UNIT
DBV (SOT-23)
6 PINS
RθJA
Junction-to-ambient thermal resistance
164.4
°C/W
RθJC(top)
Junction-to-case (top) thermal resistance
102.5
°C/W
RθJB
Junction-to-board thermal resistance
59.6
°C/W
ΨJT
Junction-to-top characterization parameter
44.0
°C/W
ΨJB
Junction-to-board characterization parameter
59.4
°C/W
RθJC(bot)
Junction-to-case (bottom) thermal resistance
N/A
°C/W
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report.
Thermal Information
THERMAL METRIC#GUID-XXXXXXXX-SF0T-XXXX-XXXX-000000306148/A_1498070457_THERMAL_1PKG_FOOTER1
REF35-Q1
UNIT
DBV (SOT-23)
6 PINS
RθJA
Junction-to-ambient thermal resistance
164.4
°C/W
RθJC(top)
Junction-to-case (top) thermal resistance
102.5
°C/W
RθJB
Junction-to-board thermal resistance
59.6
°C/W
ΨJT
Junction-to-top characterization parameter
44.0
°C/W
ΨJB
Junction-to-board characterization parameter
59.4
°C/W
RθJC(bot)
Junction-to-case (bottom) thermal resistance
N/A
°C/W
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report.
THERMAL METRIC#GUID-XXXXXXXX-SF0T-XXXX-XXXX-000000306148/A_1498070457_THERMAL_1PKG_FOOTER1
REF35-Q1
UNIT
DBV (SOT-23)
6 PINS
RθJA
Junction-to-ambient thermal resistance
164.4
°C/W
RθJC(top)
Junction-to-case (top) thermal resistance
102.5
°C/W
RθJB
Junction-to-board thermal resistance
59.6
°C/W
ΨJT
Junction-to-top characterization parameter
44.0
°C/W
ΨJB
Junction-to-board characterization parameter
59.4
°C/W
RθJC(bot)
Junction-to-case (bottom) thermal resistance
N/A
°C/W
THERMAL METRIC#GUID-XXXXXXXX-SF0T-XXXX-XXXX-000000306148/A_1498070457_THERMAL_1PKG_FOOTER1
REF35-Q1
UNIT
DBV (SOT-23)
6 PINS
RθJA
Junction-to-ambient thermal resistance
164.4
°C/W
RθJC(top)
Junction-to-case (top) thermal resistance
102.5
°C/W
RθJB
Junction-to-board thermal resistance
59.6
°C/W
ΨJT
Junction-to-top characterization parameter
44.0
°C/W
ΨJB
Junction-to-board characterization parameter
59.4
°C/W
RθJC(bot)
Junction-to-case (bottom) thermal resistance
N/A
°C/W
THERMAL METRIC#GUID-XXXXXXXX-SF0T-XXXX-XXXX-000000306148/A_1498070457_THERMAL_1PKG_FOOTER1
REF35-Q1
UNIT
DBV (SOT-23)
6 PINS
THERMAL METRIC#GUID-XXXXXXXX-SF0T-XXXX-XXXX-000000306148/A_1498070457_THERMAL_1PKG_FOOTER1
REF35-Q1
UNIT
THERMAL METRIC#GUID-XXXXXXXX-SF0T-XXXX-XXXX-000000306148/A_1498070457_THERMAL_1PKG_FOOTER1
#GUID-XXXXXXXX-SF0T-XXXX-XXXX-000000306148/A_1498070457_THERMAL_1PKG_FOOTER1REF35-Q1UNIT
DBV (SOT-23)
DBV (SOT-23)
6 PINS
6 PINS
RθJA
Junction-to-ambient thermal resistance
164.4
°C/W
RθJC(top)
Junction-to-case (top) thermal resistance
102.5
°C/W
RθJB
Junction-to-board thermal resistance
59.6
°C/W
ΨJT
Junction-to-top characterization parameter
44.0
°C/W
ΨJB
Junction-to-board characterization parameter
59.4
°C/W
RθJC(bot)
Junction-to-case (bottom) thermal resistance
N/A
°C/W
RθJA
Junction-to-ambient thermal resistance
164.4
°C/W
RθJA
θJA Junction-to-ambient thermal resistance164.4°C/W
RθJC(top)
Junction-to-case (top) thermal resistance
102.5
°C/W
RθJC(top)
θJC(top)Junction-to-case (top) thermal resistance102.5°C/W
RθJB
Junction-to-board thermal resistance
59.6
°C/W
RθJB
θJBJunction-to-board thermal resistance59.6°C/W
ΨJT
Junction-to-top characterization parameter
44.0
°C/W
ΨJT
JTJunction-to-top characterization parameter44.0°C/W
ΨJB
Junction-to-board characterization parameter
59.4
°C/W
ΨJB
JBJunction-to-board characterization parameter59.4°C/W
RθJC(bot)
Junction-to-case (bottom) thermal resistance
N/A
°C/W
RθJC(bot)
θJC(bot)Junction-to-case (bottom) thermal resistanceN/A°C/W
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report.
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report.Semiconductor and IC Package Thermal Metrics
Electrical Characteristics
At VIN = VREF + 0.5 V, VEN = VIN, CL = 10 µF, CIN = 0.1 µF, IL = 0 mA, minimum and maximum specifications at TA = –40℃ to 125℃, typical specifications TA = 25℃; unless otherwise noted
PARAMETER
TEST CONDITION
MIN
TYP
MAX
UNIT
ACCURACY AND DRIFT
Output voltage accuracy
TA = 25℃
–0.05
0.05
%
Output voltage temperature coefficient
–40℃ ≤ TA ≤ 125℃
15
ppm/℃
LINE AND LOAD REGULATION
ΔVREF/ΔVIN
Line regulation
VREF < 2.5 V; VIN = VREF + VDO to VINMAX
40
160
ppm/V
VREF ≥ 2.5 V; VIN = VREF + VDO to VINMAX
40
120
ppm/V
ΔVREF/ΔIL
Load regulation
IL = 0 mA to 10 mA,VIN = VREF + VDO
Source
20
60
ppm/mA
IL = 0 mA to 5 mA,VIN = VREF + VDO
Sink
40
350
ppm/mA
POWER SUPPLY
VIN
Input voltage #GUID-XXXXXXXX-SF0T-XXXX-XXXX-000000306155/SF4MV7HJTUCF
VREF + VDO
6
V
IQ
Quiescent current
Active mode
TA = 25℃
0.65
0.9
µA
–40℃ ≤ TA ≤ 125℃
2.6
Shutdown mode
TA = 25℃
0.1
–40℃ ≤ TA ≤ 125℃
0.5
VEN
Enable pin voltage
Active mode (EN = 1 or Float)
0.7 x VIN
V
Shutdown mode (EN = 0)
0.3 x VIN
IEN
Enable pin current
VEN = VIN
0.05
0.1
uA
VDO
Dropout voltage
IL = 5 mA
120
mV
IL = 10 mA
250
ISC
Short circuit current, Sourcing
VREF = 0 V, TA = 25℃
33
mA
ISC
Short circuit current, Sinking
VREF = VIN V, TA = 25℃
21
mA
TURN-ON TIME
tON
Turn-on time (2)
0.1% settling, CL = 1 µF, VREF = 2.5 V
2
ms
NOISE
en
Output voltage noise
ƒ = 10 Hz to 1 kHz, CL = 1 µF
0.7
ppmrms
enp-p
Low-frequency noise
ƒ = 0.1 Hz to 10 Hz, VREF ≥ 2.5 V
3.8
ppmp-p
ƒ = 0.1 Hz to 10 Hz, VREF < 2.5 V
3.3
ppmp-p
HYSTERESIS AND LONG-TERM STABILITY
Long-term stability
0 to 1000h at 35°C
30
ppm
Output voltage hysteresis
25°C, –40°C, 125°C, 25°C (cycle 1)
90
ppm
Output voltage hysteresis
25°C, –40°C, 125°C, 25°C (cycle 2)
70
ppm
STABLE CAPACITANCE RANGE
Input capacitor range
0.1
µF
Output capacitor range #GUID-XXXXXXXX-SF0T-XXXX-XXXX-000000306155/SFLSHY1OMVVI
0.1
10
µF
For VREF = 1.2 V and 1.25 V, minimum VIN = 1.7 V
Scales linearly with VREF.
ESR for the capacitor <= 400 mΩ
Electrical Characteristics
At VIN = VREF + 0.5 V, VEN = VIN, CL = 10 µF, CIN = 0.1 µF, IL = 0 mA, minimum and maximum specifications at TA = –40℃ to 125℃, typical specifications TA = 25℃; unless otherwise noted
PARAMETER
TEST CONDITION
MIN
TYP
MAX
UNIT
ACCURACY AND DRIFT
Output voltage accuracy
TA = 25℃
–0.05
0.05
%
Output voltage temperature coefficient
–40℃ ≤ TA ≤ 125℃
15
ppm/℃
LINE AND LOAD REGULATION
ΔVREF/ΔVIN
Line regulation
VREF < 2.5 V; VIN = VREF + VDO to VINMAX
40
160
ppm/V
VREF ≥ 2.5 V; VIN = VREF + VDO to VINMAX
40
120
ppm/V
ΔVREF/ΔIL
Load regulation
IL = 0 mA to 10 mA,VIN = VREF + VDO
Source
20
60
ppm/mA
IL = 0 mA to 5 mA,VIN = VREF + VDO
Sink
40
350
ppm/mA
POWER SUPPLY
VIN
Input voltage #GUID-XXXXXXXX-SF0T-XXXX-XXXX-000000306155/SF4MV7HJTUCF
VREF + VDO
6
V
IQ
Quiescent current
Active mode
TA = 25℃
0.65
0.9
µA
–40℃ ≤ TA ≤ 125℃
2.6
Shutdown mode
TA = 25℃
0.1
–40℃ ≤ TA ≤ 125℃
0.5
VEN
Enable pin voltage
Active mode (EN = 1 or Float)
0.7 x VIN
V
Shutdown mode (EN = 0)
0.3 x VIN
IEN
Enable pin current
VEN = VIN
0.05
0.1
uA
VDO
Dropout voltage
IL = 5 mA
120
mV
IL = 10 mA
250
ISC
Short circuit current, Sourcing
VREF = 0 V, TA = 25℃
33
mA
ISC
Short circuit current, Sinking
VREF = VIN V, TA = 25℃
21
mA
TURN-ON TIME
tON
Turn-on time (2)
0.1% settling, CL = 1 µF, VREF = 2.5 V
2
ms
NOISE
en
Output voltage noise
ƒ = 10 Hz to 1 kHz, CL = 1 µF
0.7
ppmrms
enp-p
Low-frequency noise
ƒ = 0.1 Hz to 10 Hz, VREF ≥ 2.5 V
3.8
ppmp-p
ƒ = 0.1 Hz to 10 Hz, VREF < 2.5 V
3.3
ppmp-p
HYSTERESIS AND LONG-TERM STABILITY
Long-term stability
0 to 1000h at 35°C
30
ppm
Output voltage hysteresis
25°C, –40°C, 125°C, 25°C (cycle 1)
90
ppm
Output voltage hysteresis
25°C, –40°C, 125°C, 25°C (cycle 2)
70
ppm
STABLE CAPACITANCE RANGE
Input capacitor range
0.1
µF
Output capacitor range #GUID-XXXXXXXX-SF0T-XXXX-XXXX-000000306155/SFLSHY1OMVVI
0.1
10
µF
For VREF = 1.2 V and 1.25 V, minimum VIN = 1.7 V
Scales linearly with VREF.
ESR for the capacitor <= 400 mΩ
At VIN = VREF + 0.5 V, VEN = VIN, CL = 10 µF, CIN = 0.1 µF, IL = 0 mA, minimum and maximum specifications at TA = –40℃ to 125℃, typical specifications TA = 25℃; unless otherwise noted
PARAMETER
TEST CONDITION
MIN
TYP
MAX
UNIT
ACCURACY AND DRIFT
Output voltage accuracy
TA = 25℃
–0.05
0.05
%
Output voltage temperature coefficient
–40℃ ≤ TA ≤ 125℃
15
ppm/℃
LINE AND LOAD REGULATION
ΔVREF/ΔVIN
Line regulation
VREF < 2.5 V; VIN = VREF + VDO to VINMAX
40
160
ppm/V
VREF ≥ 2.5 V; VIN = VREF + VDO to VINMAX
40
120
ppm/V
ΔVREF/ΔIL
Load regulation
IL = 0 mA to 10 mA,VIN = VREF + VDO
Source
20
60
ppm/mA
IL = 0 mA to 5 mA,VIN = VREF + VDO
Sink
40
350
ppm/mA
POWER SUPPLY
VIN
Input voltage #GUID-XXXXXXXX-SF0T-XXXX-XXXX-000000306155/SF4MV7HJTUCF
VREF + VDO
6
V
IQ
Quiescent current
Active mode
TA = 25℃
0.65
0.9
µA
–40℃ ≤ TA ≤ 125℃
2.6
Shutdown mode
TA = 25℃
0.1
–40℃ ≤ TA ≤ 125℃
0.5
VEN
Enable pin voltage
Active mode (EN = 1 or Float)
0.7 x VIN
V
Shutdown mode (EN = 0)
0.3 x VIN
IEN
Enable pin current
VEN = VIN
0.05
0.1
uA
VDO
Dropout voltage
IL = 5 mA
120
mV
IL = 10 mA
250
ISC
Short circuit current, Sourcing
VREF = 0 V, TA = 25℃
33
mA
ISC
Short circuit current, Sinking
VREF = VIN V, TA = 25℃
21
mA
TURN-ON TIME
tON
Turn-on time (2)
0.1% settling, CL = 1 µF, VREF = 2.5 V
2
ms
NOISE
en
Output voltage noise
ƒ = 10 Hz to 1 kHz, CL = 1 µF
0.7
ppmrms
enp-p
Low-frequency noise
ƒ = 0.1 Hz to 10 Hz, VREF ≥ 2.5 V
3.8
ppmp-p
ƒ = 0.1 Hz to 10 Hz, VREF < 2.5 V
3.3
ppmp-p
HYSTERESIS AND LONG-TERM STABILITY
Long-term stability
0 to 1000h at 35°C
30
ppm
Output voltage hysteresis
25°C, –40°C, 125°C, 25°C (cycle 1)
90
ppm
Output voltage hysteresis
25°C, –40°C, 125°C, 25°C (cycle 2)
70
ppm
STABLE CAPACITANCE RANGE
Input capacitor range
0.1
µF
Output capacitor range #GUID-XXXXXXXX-SF0T-XXXX-XXXX-000000306155/SFLSHY1OMVVI
0.1
10
µF
At VIN = VREF + 0.5 V, VEN = VIN, CL = 10 µF, CIN = 0.1 µF, IL = 0 mA, minimum and maximum specifications at TA = –40℃ to 125℃, typical specifications TA = 25℃; unless otherwise notedINREFENINLINLAA
PARAMETER
TEST CONDITION
MIN
TYP
MAX
UNIT
ACCURACY AND DRIFT
Output voltage accuracy
TA = 25℃
–0.05
0.05
%
Output voltage temperature coefficient
–40℃ ≤ TA ≤ 125℃
15
ppm/℃
LINE AND LOAD REGULATION
ΔVREF/ΔVIN
Line regulation
VREF < 2.5 V; VIN = VREF + VDO to VINMAX
40
160
ppm/V
VREF ≥ 2.5 V; VIN = VREF + VDO to VINMAX
40
120
ppm/V
ΔVREF/ΔIL
Load regulation
IL = 0 mA to 10 mA,VIN = VREF + VDO
Source
20
60
ppm/mA
IL = 0 mA to 5 mA,VIN = VREF + VDO
Sink
40
350
ppm/mA
POWER SUPPLY
VIN
Input voltage #GUID-XXXXXXXX-SF0T-XXXX-XXXX-000000306155/SF4MV7HJTUCF
VREF + VDO
6
V
IQ
Quiescent current
Active mode
TA = 25℃
0.65
0.9
µA
–40℃ ≤ TA ≤ 125℃
2.6
Shutdown mode
TA = 25℃
0.1
–40℃ ≤ TA ≤ 125℃
0.5
VEN
Enable pin voltage
Active mode (EN = 1 or Float)
0.7 x VIN
V
Shutdown mode (EN = 0)
0.3 x VIN
IEN
Enable pin current
VEN = VIN
0.05
0.1
uA
VDO
Dropout voltage
IL = 5 mA
120
mV
IL = 10 mA
250
ISC
Short circuit current, Sourcing
VREF = 0 V, TA = 25℃
33
mA
ISC
Short circuit current, Sinking
VREF = VIN V, TA = 25℃
21
mA
TURN-ON TIME
tON
Turn-on time (2)
0.1% settling, CL = 1 µF, VREF = 2.5 V
2
ms
NOISE
en
Output voltage noise
ƒ = 10 Hz to 1 kHz, CL = 1 µF
0.7
ppmrms
enp-p
Low-frequency noise
ƒ = 0.1 Hz to 10 Hz, VREF ≥ 2.5 V
3.8
ppmp-p
ƒ = 0.1 Hz to 10 Hz, VREF < 2.5 V
3.3
ppmp-p
HYSTERESIS AND LONG-TERM STABILITY
Long-term stability
0 to 1000h at 35°C
30
ppm
Output voltage hysteresis
25°C, –40°C, 125°C, 25°C (cycle 1)
90
ppm
Output voltage hysteresis
25°C, –40°C, 125°C, 25°C (cycle 2)
70
ppm
STABLE CAPACITANCE RANGE
Input capacitor range
0.1
µF
Output capacitor range #GUID-XXXXXXXX-SF0T-XXXX-XXXX-000000306155/SFLSHY1OMVVI
0.1
10
µF
PARAMETER
TEST CONDITION
MIN
TYP
MAX
UNIT
PARAMETER
TEST CONDITION
MIN
TYP
MAX
UNIT
PARAMETERTEST CONDITIONMINTYPMAXUNIT
ACCURACY AND DRIFT
Output voltage accuracy
TA = 25℃
–0.05
0.05
%
Output voltage temperature coefficient
–40℃ ≤ TA ≤ 125℃
15
ppm/℃
LINE AND LOAD REGULATION
ΔVREF/ΔVIN
Line regulation
VREF < 2.5 V; VIN = VREF + VDO to VINMAX
40
160
ppm/V
VREF ≥ 2.5 V; VIN = VREF + VDO to VINMAX
40
120
ppm/V
ΔVREF/ΔIL
Load regulation
IL = 0 mA to 10 mA,VIN = VREF + VDO
Source
20
60
ppm/mA
IL = 0 mA to 5 mA,VIN = VREF + VDO
Sink
40
350
ppm/mA
POWER SUPPLY
VIN
Input voltage #GUID-XXXXXXXX-SF0T-XXXX-XXXX-000000306155/SF4MV7HJTUCF
VREF + VDO
6
V
IQ
Quiescent current
Active mode
TA = 25℃
0.65
0.9
µA
–40℃ ≤ TA ≤ 125℃
2.6
Shutdown mode
TA = 25℃
0.1
–40℃ ≤ TA ≤ 125℃
0.5
VEN
Enable pin voltage
Active mode (EN = 1 or Float)
0.7 x VIN
V
Shutdown mode (EN = 0)
0.3 x VIN
IEN
Enable pin current
VEN = VIN
0.05
0.1
uA
VDO
Dropout voltage
IL = 5 mA
120
mV
IL = 10 mA
250
ISC
Short circuit current, Sourcing
VREF = 0 V, TA = 25℃
33
mA
ISC
Short circuit current, Sinking
VREF = VIN V, TA = 25℃
21
mA
TURN-ON TIME
tON
Turn-on time (2)
0.1% settling, CL = 1 µF, VREF = 2.5 V
2
ms
NOISE
en
Output voltage noise
ƒ = 10 Hz to 1 kHz, CL = 1 µF
0.7
ppmrms
enp-p
Low-frequency noise
ƒ = 0.1 Hz to 10 Hz, VREF ≥ 2.5 V
3.8
ppmp-p
ƒ = 0.1 Hz to 10 Hz, VREF < 2.5 V
3.3
ppmp-p
HYSTERESIS AND LONG-TERM STABILITY
Long-term stability
0 to 1000h at 35°C
30
ppm
Output voltage hysteresis
25°C, –40°C, 125°C, 25°C (cycle 1)
90
ppm
Output voltage hysteresis
25°C, –40°C, 125°C, 25°C (cycle 2)
70
ppm
STABLE CAPACITANCE RANGE
Input capacitor range
0.1
µF
Output capacitor range #GUID-XXXXXXXX-SF0T-XXXX-XXXX-000000306155/SFLSHY1OMVVI
0.1
10
µF
ACCURACY AND DRIFT
ACCURACY AND DRIFT
Output voltage accuracy
TA = 25℃
–0.05
0.05
%
Output voltage accuracyTA = 25℃A–0.050.05%
Output voltage temperature coefficient
–40℃ ≤ TA ≤ 125℃
15
ppm/℃
Output voltage temperature coefficient–40℃ ≤ TA ≤ 125℃A15ppm/℃
LINE AND LOAD REGULATION
LINE AND LOAD REGULATION
ΔVREF/ΔVIN
Line regulation
VREF < 2.5 V; VIN = VREF + VDO to VINMAX
40
160
ppm/V
ΔVREF/ΔVIN
REFINLine regulationVREF < 2.5 V; VIN = VREF + VDO to VINMAX
REFINREFDOINMAX40160ppm/V
VREF ≥ 2.5 V; VIN = VREF + VDO to VINMAX
40
120
ppm/V
VREF ≥ 2.5 V; VIN = VREF + VDO to VINMAX
REFINREFDOINMAX40120ppm/V
ΔVREF/ΔIL
Load regulation
IL = 0 mA to 10 mA,VIN = VREF + VDO
Source
20
60
ppm/mA
ΔVREF/ΔIL
REFLLoad regulationIL = 0 mA to 10 mA,VIN = VREF + VDO
LIN REFDOSource2060ppm/mA
IL = 0 mA to 5 mA,VIN = VREF + VDO
Sink
40
350
ppm/mA
IL = 0 mA to 5 mA,VIN = VREF + VDO
LIN REFDOSink40350ppm/mA
POWER SUPPLY
POWER SUPPLY
VIN
Input voltage #GUID-XXXXXXXX-SF0T-XXXX-XXXX-000000306155/SF4MV7HJTUCF
VREF + VDO
6
V
VIN
INInput voltage #GUID-XXXXXXXX-SF0T-XXXX-XXXX-000000306155/SF4MV7HJTUCF
#GUID-XXXXXXXX-SF0T-XXXX-XXXX-000000306155/SF4MV7HJTUCFVREF + VDO
REFDO6V
IQ
Quiescent current
Active mode
TA = 25℃
0.65
0.9
µA
IQ
QQuiescent currentActive modeTA = 25℃A0.650.9µA
–40℃ ≤ TA ≤ 125℃
2.6
–40℃ ≤ TA ≤ 125℃A2.6
Shutdown mode
TA = 25℃
0.1
Shutdown modeTA = 25℃A0.1
–40℃ ≤ TA ≤ 125℃
0.5
–40℃ ≤ TA ≤ 125℃A0.5
VEN
Enable pin voltage
Active mode (EN = 1 or Float)
0.7 x VIN
V
VEN
ENEnable pin voltageActive mode (EN = 1 or Float)0.7 x VIN
INV
Shutdown mode (EN = 0)
0.3 x VIN
Shutdown mode (EN = 0)0.3 x VIN
IN
IEN
Enable pin current
VEN = VIN
0.05
0.1
uA
IEN
ENEnable pin currentVEN = VIN
ENIN0.050.1uA
VDO
Dropout voltage
IL = 5 mA
120
mV
VDO
DODropout voltageIL = 5 mAL 120mV
IL = 10 mA
250
IL = 10 mAL250
ISC
Short circuit current, Sourcing
VREF = 0 V, TA = 25℃
33
mA
ISC
SCShort circuit current, SourcingVREF = 0 V, TA = 25℃REFA33mA
ISC
Short circuit current, Sinking
VREF = VIN V, TA = 25℃
21
mA
ISC
SCShort circuit current, SinkingVREF = VIN V, TA = 25℃REFINA21mA
TURN-ON TIME
TURN-ON TIME
tON
Turn-on time (2)
0.1% settling, CL = 1 µF, VREF = 2.5 V
2
ms
tON
ONTurn-on time (2)
(2)0.1% settling, CL = 1 µF, VREF = 2.5 VL REF2ms
NOISE
NOISE
en
Output voltage noise
ƒ = 10 Hz to 1 kHz, CL = 1 µF
0.7
ppmrms
en
nOutput voltage noiseƒ = 10 Hz to 1 kHz, CL = 1 µFL 0.7ppmrms
rms
enp-p
Low-frequency noise
ƒ = 0.1 Hz to 10 Hz, VREF ≥ 2.5 V
3.8
ppmp-p
enp-p
np-pLow-frequency noiseƒ = 0.1 Hz to 10 Hz, VREF ≥ 2.5 VREF3.8ppmp-p
p-p
ƒ = 0.1 Hz to 10 Hz, VREF < 2.5 V
3.3
ppmp-p
ƒ = 0.1 Hz to 10 Hz, VREF < 2.5 VREF3.3ppmp-p
p-p
HYSTERESIS AND LONG-TERM STABILITY
HYSTERESIS AND LONG-TERM STABILITY
Long-term stability
0 to 1000h at 35°C
30
ppm
Long-term stability0 to 1000h at 35°C30ppm
Output voltage hysteresis
25°C, –40°C, 125°C, 25°C (cycle 1)
90
ppm
Output voltage hysteresis 25°C, –40°C, 125°C, 25°C (cycle 1)90ppm
Output voltage hysteresis
25°C, –40°C, 125°C, 25°C (cycle 2)
70
ppm
Output voltage hysteresis 25°C, –40°C, 125°C, 25°C (cycle 2)70ppm
STABLE CAPACITANCE RANGE
STABLE CAPACITANCE RANGE
Input capacitor range
0.1
µF
Input capacitor range0.1µF
Output capacitor range #GUID-XXXXXXXX-SF0T-XXXX-XXXX-000000306155/SFLSHY1OMVVI
0.1
10
µF
Output capacitor range #GUID-XXXXXXXX-SF0T-XXXX-XXXX-000000306155/SFLSHY1OMVVI #GUID-XXXXXXXX-SF0T-XXXX-XXXX-000000306155/SFLSHY1OMVVI0.110µF
For VREF = 1.2 V and 1.25 V, minimum VIN = 1.7 V
Scales linearly with VREF.
ESR for the capacitor <= 400 mΩ
For VREF = 1.2 V and 1.25 V, minimum VIN = 1.7 VREFINScales linearly with VREF.REFESR for the capacitor <= 400 mΩ
Typical Characteristics
at TA = 25°C, VIN =
VEN = VREF + 0.3 V, IL = 0 mA, CL = 10 µF,
CIN = 0.1 µF (unless otherwise noted)
Output Voltage
Drift vs Free-Air Temperature
Initial
Accuracy Distribution
0.1 Hz to 10 Hz
Noise Distribution
(VREF = 1.25 V,
CNR = Open, IL = 0 mA)
0.1 Hz to 10 Hz Noise Distribution
(VREF = 2.5 V, CNR = Open,
IL = 0 mA)
0.1 Hz to 10 Hz Noise Distribution
(VREF = 2.5 V, CL = 1 μF,
CNR = Open)
0.1 Hz to 10 Hz Noise Distribution
(VREF = 2.5 V, CL = 1 μF,
IL = 0 mA)
0.1 Hz to 10 Hz Noise Distribution
(VREF = 5 V, CNR = Open,
IL = 0 mA)
Noise Density vs Frequency
(VREF = 1.25 V, IL = 0 mA)
Noise Density vs Frequency
(VREF = 2.5 V, IL = 0 mA)
Noise Density vs Frequency
(VREF = 5 V, IL = 0 mA)
Load Regulation
(Sourcing 10 mA) vs Free-Air Temperature
Load Regulation
(Sinking 5 mA) vs Free-Air Temperature
Load Transient Response
(VREF = 2.5 V, CL = 10 μF)
Load Transient Response
(VREF = 2.5 V, CL = 10 μF)
Load Transient Response
(VREF = 2.5 V, CL = 1 μF)
Load Transient Response
(VREF = 2.5 V, CL = 1 μF)
Load Transient Response
(VREF = 1.25 V, CL = 1 μF)
Load Transient Response
(VREF = 1.25 V, CL = 1 μF)
Line Regulation
vs Free-Air Temperature
Line Transient Response
(VREF = 1.25 V, CL = 1 μF)
Line Transient Response
(VREF = 2.5 V, CL = 1 μF)
Power Supply Rejection Ratio
(VREF = 2.5 V, IL = 0 mA)
Output
Impedance
Quiescent
Current vs Free-Air Temperature
Dropout Voltage
vs Free-Air Temperature
Solder Heat
Shift Distribution
Long Term
Stability - 1000 hours (VREF)
Typical Characteristics
at TA = 25°C, VIN =
VEN = VREF + 0.3 V, IL = 0 mA, CL = 10 µF,
CIN = 0.1 µF (unless otherwise noted)
Output Voltage
Drift vs Free-Air Temperature
Initial
Accuracy Distribution
0.1 Hz to 10 Hz
Noise Distribution
(VREF = 1.25 V,
CNR = Open, IL = 0 mA)
0.1 Hz to 10 Hz Noise Distribution
(VREF = 2.5 V, CNR = Open,
IL = 0 mA)
0.1 Hz to 10 Hz Noise Distribution
(VREF = 2.5 V, CL = 1 μF,
CNR = Open)
0.1 Hz to 10 Hz Noise Distribution
(VREF = 2.5 V, CL = 1 μF,
IL = 0 mA)
0.1 Hz to 10 Hz Noise Distribution
(VREF = 5 V, CNR = Open,
IL = 0 mA)
Noise Density vs Frequency
(VREF = 1.25 V, IL = 0 mA)
Noise Density vs Frequency
(VREF = 2.5 V, IL = 0 mA)
Noise Density vs Frequency
(VREF = 5 V, IL = 0 mA)
Load Regulation
(Sourcing 10 mA) vs Free-Air Temperature
Load Regulation
(Sinking 5 mA) vs Free-Air Temperature
Load Transient Response
(VREF = 2.5 V, CL = 10 μF)
Load Transient Response
(VREF = 2.5 V, CL = 10 μF)
Load Transient Response
(VREF = 2.5 V, CL = 1 μF)
Load Transient Response
(VREF = 2.5 V, CL = 1 μF)
Load Transient Response
(VREF = 1.25 V, CL = 1 μF)
Load Transient Response
(VREF = 1.25 V, CL = 1 μF)
Line Regulation
vs Free-Air Temperature
Line Transient Response
(VREF = 1.25 V, CL = 1 μF)
Line Transient Response
(VREF = 2.5 V, CL = 1 μF)
Power Supply Rejection Ratio
(VREF = 2.5 V, IL = 0 mA)
Output
Impedance
Quiescent
Current vs Free-Air Temperature
Dropout Voltage
vs Free-Air Temperature
Solder Heat
Shift Distribution
Long Term
Stability - 1000 hours (VREF)
at TA = 25°C, VIN =
VEN = VREF + 0.3 V, IL = 0 mA, CL = 10 µF,
CIN = 0.1 µF (unless otherwise noted)
Output Voltage
Drift vs Free-Air Temperature
Initial
Accuracy Distribution
0.1 Hz to 10 Hz
Noise Distribution
(VREF = 1.25 V,
CNR = Open, IL = 0 mA)
0.1 Hz to 10 Hz Noise Distribution
(VREF = 2.5 V, CNR = Open,
IL = 0 mA)
0.1 Hz to 10 Hz Noise Distribution
(VREF = 2.5 V, CL = 1 μF,
CNR = Open)
0.1 Hz to 10 Hz Noise Distribution
(VREF = 2.5 V, CL = 1 μF,
IL = 0 mA)
0.1 Hz to 10 Hz Noise Distribution
(VREF = 5 V, CNR = Open,
IL = 0 mA)
Noise Density vs Frequency
(VREF = 1.25 V, IL = 0 mA)
Noise Density vs Frequency
(VREF = 2.5 V, IL = 0 mA)
Noise Density vs Frequency
(VREF = 5 V, IL = 0 mA)
Load Regulation
(Sourcing 10 mA) vs Free-Air Temperature
Load Regulation
(Sinking 5 mA) vs Free-Air Temperature
Load Transient Response
(VREF = 2.5 V, CL = 10 μF)
Load Transient Response
(VREF = 2.5 V, CL = 10 μF)
Load Transient Response
(VREF = 2.5 V, CL = 1 μF)
Load Transient Response
(VREF = 2.5 V, CL = 1 μF)
Load Transient Response
(VREF = 1.25 V, CL = 1 μF)
Load Transient Response
(VREF = 1.25 V, CL = 1 μF)
Line Regulation
vs Free-Air Temperature
Line Transient Response
(VREF = 1.25 V, CL = 1 μF)
Line Transient Response
(VREF = 2.5 V, CL = 1 μF)
Power Supply Rejection Ratio
(VREF = 2.5 V, IL = 0 mA)
Output
Impedance
Quiescent
Current vs Free-Air Temperature
Dropout Voltage
vs Free-Air Temperature
Solder Heat
Shift Distribution
Long Term
Stability - 1000 hours (VREF)
at TA = 25°C, VIN =
VEN = VREF + 0.3 V, IL = 0 mA, CL = 10 µF,
CIN = 0.1 µF (unless otherwise noted)AINENREFLLIN
Output Voltage
Drift vs Free-Air Temperature
Initial
Accuracy Distribution
0.1 Hz to 10 Hz
Noise Distribution
(VREF = 1.25 V,
CNR = Open, IL = 0 mA)
0.1 Hz to 10 Hz Noise Distribution
(VREF = 2.5 V, CNR = Open,
IL = 0 mA)
0.1 Hz to 10 Hz Noise Distribution
(VREF = 2.5 V, CL = 1 μF,
CNR = Open)
0.1 Hz to 10 Hz Noise Distribution
(VREF = 2.5 V, CL = 1 μF,
IL = 0 mA)
0.1 Hz to 10 Hz Noise Distribution
(VREF = 5 V, CNR = Open,
IL = 0 mA)
Noise Density vs Frequency
(VREF = 1.25 V, IL = 0 mA)
Noise Density vs Frequency
(VREF = 2.5 V, IL = 0 mA)
Noise Density vs Frequency
(VREF = 5 V, IL = 0 mA)
Load Regulation
(Sourcing 10 mA) vs Free-Air Temperature
Load Regulation
(Sinking 5 mA) vs Free-Air Temperature
Load Transient Response
(VREF = 2.5 V, CL = 10 μF)
Load Transient Response
(VREF = 2.5 V, CL = 10 μF)
Load Transient Response
(VREF = 2.5 V, CL = 1 μF)
Load Transient Response
(VREF = 2.5 V, CL = 1 μF)
Load Transient Response
(VREF = 1.25 V, CL = 1 μF)
Load Transient Response
(VREF = 1.25 V, CL = 1 μF)
Line Regulation
vs Free-Air Temperature
Line Transient Response
(VREF = 1.25 V, CL = 1 μF)
Line Transient Response
(VREF = 2.5 V, CL = 1 μF)
Power Supply Rejection Ratio
(VREF = 2.5 V, IL = 0 mA)
Output
Impedance
Quiescent
Current vs Free-Air Temperature
Dropout Voltage
vs Free-Air Temperature
Solder Heat
Shift Distribution
Long Term
Stability - 1000 hours (VREF)
Output Voltage
Drift vs Free-Air Temperature
Output Voltage
Drift vs Free-Air Temperature
Initial
Accuracy Distribution
Initial
Accuracy Distribution
0.1 Hz to 10 Hz
Noise Distribution
(VREF = 1.25 V,
CNR = Open, IL = 0 mA)
0.1 Hz to 10 Hz
Noise Distribution
(VREF = 1.25 V,
CNR = Open, IL = 0 mA)REFNRL
0.1 Hz to 10 Hz Noise Distribution
(VREF = 2.5 V, CNR = Open,
IL = 0 mA)
0.1 Hz to 10 Hz Noise Distribution
(VREF = 2.5 V, CNR = Open,
IL = 0 mA)REFNRL
0.1 Hz to 10 Hz Noise Distribution
(VREF = 2.5 V, CL = 1 μF,
CNR = Open)
0.1 Hz to 10 Hz Noise Distribution
(VREF = 2.5 V, CL = 1 μF,
CNR = Open)REFLNR
0.1 Hz to 10 Hz Noise Distribution
(VREF = 2.5 V, CL = 1 μF,
IL = 0 mA)
0.1 Hz to 10 Hz Noise Distribution
(VREF = 2.5 V, CL = 1 μF,
IL = 0 mA)REFLL
0.1 Hz to 10 Hz Noise Distribution
(VREF = 5 V, CNR = Open,
IL = 0 mA)
0.1 Hz to 10 Hz Noise Distribution
(VREF = 5 V, CNR = Open,
IL = 0 mA)REFNRL
Noise Density vs Frequency
(VREF = 1.25 V, IL = 0 mA)
Noise Density vs Frequency
(VREF = 1.25 V, IL = 0 mA)REFL
Noise Density vs Frequency
(VREF = 2.5 V, IL = 0 mA)
Noise Density vs Frequency
(VREF = 2.5 V, IL = 0 mA)REFL
Noise Density vs Frequency
(VREF = 5 V, IL = 0 mA)
Noise Density vs Frequency
(VREF = 5 V, IL = 0 mA)REFL
Load Regulation
(Sourcing 10 mA) vs Free-Air Temperature
Load Regulation
(Sourcing 10 mA) vs Free-Air Temperature
Load Regulation
(Sinking 5 mA) vs Free-Air Temperature
Load Regulation
(Sinking 5 mA) vs Free-Air Temperature
Load Transient Response
(VREF = 2.5 V, CL = 10 μF)
Load Transient Response
(VREF = 2.5 V, CL = 10 μF)REFL
Load Transient Response
(VREF = 2.5 V, CL = 10 μF)
Load Transient Response
(VREF = 2.5 V, CL = 10 μF)REFL
Load Transient Response
(VREF = 2.5 V, CL = 1 μF)
Load Transient Response
(VREF = 2.5 V, CL = 1 μF)REFL
Load Transient Response
(VREF = 2.5 V, CL = 1 μF)
Load Transient Response
(VREF = 2.5 V, CL = 1 μF)REFL
Load Transient Response
(VREF = 1.25 V, CL = 1 μF)
Load Transient Response
(VREF = 1.25 V, CL = 1 μF)REFL
Load Transient Response
(VREF = 1.25 V, CL = 1 μF)
Load Transient Response
(VREF = 1.25 V, CL = 1 μF)REFL
Line Regulation
vs Free-Air Temperature
Line Regulation
vs Free-Air Temperature
Line Transient Response
(VREF = 1.25 V, CL = 1 μF)
Line Transient Response
(VREF = 1.25 V, CL = 1 μF)REFL
Line Transient Response
(VREF = 2.5 V, CL = 1 μF)
Line Transient Response
(VREF = 2.5 V, CL = 1 μF)REFL
Power Supply Rejection Ratio
(VREF = 2.5 V, IL = 0 mA)
Power Supply Rejection Ratio
(VREF = 2.5 V, IL = 0 mA)REFL
Output
Impedance
Output
Impedance
Quiescent
Current vs Free-Air Temperature
Quiescent
Current vs Free-Air Temperature
Dropout Voltage
vs Free-Air Temperature
Dropout Voltage
vs Free-Air Temperature
Solder Heat
Shift Distribution
Solder Heat
Shift Distribution
Long Term
Stability - 1000 hours (VREF)
Long Term
Stability - 1000 hours (VREF)REF
Parameter Measurement Information
Solder Heat Shift
The materials used in the manufacture of the
REF35-Q1 have differing coefficients of thermal expansion, resulting in stress on the device
die when the part is heated. Mechanical and thermal stress on the device die can cause the
output voltages to shift, degrading the initial accuracy specifications of the product.
Reflow soldering is a common cause of this error.
To illustrate this effect, a total of 32 devices
were soldered on one printed circuit board using lead-free solder paste and the paste
manufacturer suggested reflow profile. shows the reflow profile. The printed circuit board is comprised of FR4 material. The
board thickness is 1.66 mm and the area is 174 mm × 135 mm.
Reflow
Profile
The reference output voltage is measured before
and after the reflow process; shows the typical shift. Although all tested units exhibit very low shifts (< 0.03%),
higher shifts are also possible depending on the size, thickness, and material of the
printed circuit board (PCB). An important note is that the histograms display the typical
shift for exposure to a single reflow profile. Exposure to multiple reflows, as is common on
PCBs with surface-mount components on both sides, causes additional shifts in the output
bias voltage. If the PCB is exposed to multiple reflows, the device must be soldered in the
last pass to minimize its exposure to thermal stress.
Solder Heat Shift
Distribution, VREF (%)
Temperature Coefficient
The REF35-Q1 is designed and tested for a low
output voltage temperature coefficient, which is defined as the change in output
voltage over temperature. The temperature coefficient is calculated using the box
method in which a box is formed by the minimum/maximum limits for the nominal output
voltage over the operating temperature range. REF35-Q1 has a low maximum temperature
coefficient of 15 ppm/°C from –40°C to +125°C. The box method specifies limits for
the temperature error but does not specify the exact shape and slope of the device
under test. Due to temperature curvature correction to achieve low-temperature
drift, the temperature drift is expected to be non-linear. See TI's Analog Design
Journal,
Precision voltage references
, for more information on the box
method. Use for the box method.
shows a typical voltage versus temperature curves for various reference voltages.
Output Voltage Drift Vs
Free-Air Temperature
Long-Term Stability
One of the key performance parameters of the
REF35-Q1 references is long-term stability also known as long-term
drift. The long-term stability value is tested in a typical setup
that reflects standard PCB board manufacturing practices. The boards
are made of standard FR4 material and the board does not have
special cuts or grooves around the devices to relieve the mechanical
stress of the PCB. The devices and boards in this test do not
undergo high temperature burn in post-soldering prior to testing.
These conditions reflect a real world use case scenario and common
manufacturing techniques.
During the long-term stability
testing, precautions are taken to ensure that only the long-term stability drift is
being measured. The boards are maintained at 35°C in an oil bath. The oil bath
ensures that the temperature is constant across the device over time compared to an
air oven. The measurements are captured every 30 minutes with a calibrated 8.5 digit
multimeter.
The typical long-term stability characteristic is
expressed as a deviation of the reference voltage output over
time.
shows the typical drift value for the REF35-Q1 in 6-pin SOT-23
package is 30 ppm from 0 to 1000 hours. It is important to
understand that long-term stability is not ensured by design and
that the value is typical. The REF35-Q1 will experience the highest
drift in the initial 1000 hr. Subsequent deviation is typically
lower than first 1000 hr.
Long Term Stability - 1000 hours
(VREF)
Thermal Hysteresis
Thermal hysteresis is measured with the REF35-Q1
soldered to a PCB, similar to a real-world application. Thermal hysteresis for the
device is defined as the change in output voltage after operating the device at
25°C, cycling the device through the specified temperature range, and returning to
25°C. The PCB was baked at 150°C for 30 minutes before thermal hysteresis was
measured. Use to calculate the thermal hysteresis.
where
VHYST = thermal hysteresis (in units of ppm)
VNOM = the specified output voltage
VPRE = output voltage measured at 25°C pre-temperature cycling
VPOST = output voltage measured after
the device has cycled from 25°C through the specified temperature range of –40°C
to +125°C and returns to 25°C.
and show the
typical thermal hysteresis distribution across various temperature ranges in two
cycles.
Thermal Hysteresis
Distribution
-40ºC to 125ºC, Cycle 1
Thermal Hysteresis
Distribution
-40ºC to 125ºC, Cycle 2
Noise Performance
The reference pin output noise is categorized as
low frequency and broadband noise. The following sections describe
these categories in detail.
Low-Frequency (1/f) Noise
Flicker noise, also known as 1/f noise, is a
low-frequency noise that affects the device output voltage which can affect
precision measurements in ADCs. This noise increases proportionally with output
voltage and operating temperature. The noise is measured by filtering the output
from 0.1 Hz to 10 Hz. The 1/f noise is an extremely low value, therefore the
frequency of interest must be amplified and band-pass filtered. This is done by
using a high-pass filter to block the DC voltage. The resulting noise is then
amplified by a gain of 1000. The bandpass filter is created by a series of high-pass
and low-pass filter that adds additional gain to make it more visible on a
oscilloscope as shown in . shows
the effect of flicker noise over 10 second. Flicker noise must be tested in a
Faraday cage enclosure to block environmental noise.
Low-Frequency (1/f) Noise Test
Setup
0.1 Hz to 10 Hz Voltage
Noise
shows the
typical 1/f noise (0.1 Hz to 10 Hz) distribution across various load conditions. The
REF35-Q1 device also offers noise reduction functionality by adding an optional
capacitor between NR (pin 5) and ground pins.
shows the typical 1/f noise (0.1 Hz to 10 Hz) distribution across REF35-Q1
devices with various capacitance between NR pin and GND.
0.1 Hz to 10 Hz Noise Distribution vs Load
Conditions
0.1 Hz to 10 Hz Noise Distribution vs NR
Capacitance
Broadband Noise
Broadband noise is a noise that appears at
higher frequency compared to 1/f noise. The broadband noise is measured by high-pass
filtering the output of the reference device, followed by a gain stage and measuring
the result on a spectrum analyzer as shown in
Broadband Noise Test
Setup
For noise sensitive designs, a low-pass filter can
be used to reduce broadband noise output noise levels by removing the high frequency
components. When designing a low-pass filter, take special care to make sure the
output impedance of the filter does not degrade AC performance. This can occur in RC
low-pass filters where a large series resistance can impact the load transients due
to output current fluctuations. The REF35-Q1 device also offers noise reduction
functionality by adding an optional capacitor between NR (pin 5) and ground pins.
and
show
the noise spectrum for REF35250 and REF35500 devices respectively across various NR
pin capacitance.
Noise Spectrum 10 Hz to 100 kHz
(VREF = 2.5 V)
Noise Spectrum 10 Hz to 100 kHz
(VREF = 5 V)
Power Dissipation
The REF35-Q1 voltage references are capable of
source up to 10 mA and sink up to 5 mA of load current across the rated input
voltage range. However, when used in applications subject to high ambient
temperatures, the input voltage and load current must be carefully monitored to
ensure that the device does not exceeded its maximum power dissipation rating. The
maximum power dissipation of the device can be calculated with #GUID-A65942E4-6508-43BD-B5EB-468A2E1B9E35/T4594395-4:
where
PD is the device power dissipation
TJ is the device junction temperature
TA is the ambient temperature
RθJA is the package (junction-to-air) thermal resistance
Because of this relationship, acceptable load current in high temperature conditions may be less than the maximum current-sourcing capability of the device. In no case should the device be operated outside of its maximum power rating because doing so can result in premature failure or permanent damage to the device.
Parameter Measurement Information
Solder Heat Shift
The materials used in the manufacture of the
REF35-Q1 have differing coefficients of thermal expansion, resulting in stress on the device
die when the part is heated. Mechanical and thermal stress on the device die can cause the
output voltages to shift, degrading the initial accuracy specifications of the product.
Reflow soldering is a common cause of this error.
To illustrate this effect, a total of 32 devices
were soldered on one printed circuit board using lead-free solder paste and the paste
manufacturer suggested reflow profile. shows the reflow profile. The printed circuit board is comprised of FR4 material. The
board thickness is 1.66 mm and the area is 174 mm × 135 mm.
Reflow
Profile
The reference output voltage is measured before
and after the reflow process; shows the typical shift. Although all tested units exhibit very low shifts (< 0.03%),
higher shifts are also possible depending on the size, thickness, and material of the
printed circuit board (PCB). An important note is that the histograms display the typical
shift for exposure to a single reflow profile. Exposure to multiple reflows, as is common on
PCBs with surface-mount components on both sides, causes additional shifts in the output
bias voltage. If the PCB is exposed to multiple reflows, the device must be soldered in the
last pass to minimize its exposure to thermal stress.
Solder Heat Shift
Distribution, VREF (%)
Solder Heat Shift
The materials used in the manufacture of the
REF35-Q1 have differing coefficients of thermal expansion, resulting in stress on the device
die when the part is heated. Mechanical and thermal stress on the device die can cause the
output voltages to shift, degrading the initial accuracy specifications of the product.
Reflow soldering is a common cause of this error.
To illustrate this effect, a total of 32 devices
were soldered on one printed circuit board using lead-free solder paste and the paste
manufacturer suggested reflow profile. shows the reflow profile. The printed circuit board is comprised of FR4 material. The
board thickness is 1.66 mm and the area is 174 mm × 135 mm.
Reflow
Profile
The reference output voltage is measured before
and after the reflow process; shows the typical shift. Although all tested units exhibit very low shifts (< 0.03%),
higher shifts are also possible depending on the size, thickness, and material of the
printed circuit board (PCB). An important note is that the histograms display the typical
shift for exposure to a single reflow profile. Exposure to multiple reflows, as is common on
PCBs with surface-mount components on both sides, causes additional shifts in the output
bias voltage. If the PCB is exposed to multiple reflows, the device must be soldered in the
last pass to minimize its exposure to thermal stress.
Solder Heat Shift
Distribution, VREF (%)
The materials used in the manufacture of the
REF35-Q1 have differing coefficients of thermal expansion, resulting in stress on the device
die when the part is heated. Mechanical and thermal stress on the device die can cause the
output voltages to shift, degrading the initial accuracy specifications of the product.
Reflow soldering is a common cause of this error.
To illustrate this effect, a total of 32 devices
were soldered on one printed circuit board using lead-free solder paste and the paste
manufacturer suggested reflow profile. shows the reflow profile. The printed circuit board is comprised of FR4 material. The
board thickness is 1.66 mm and the area is 174 mm × 135 mm.
Reflow
Profile
The reference output voltage is measured before
and after the reflow process; shows the typical shift. Although all tested units exhibit very low shifts (< 0.03%),
higher shifts are also possible depending on the size, thickness, and material of the
printed circuit board (PCB). An important note is that the histograms display the typical
shift for exposure to a single reflow profile. Exposure to multiple reflows, as is common on
PCBs with surface-mount components on both sides, causes additional shifts in the output
bias voltage. If the PCB is exposed to multiple reflows, the device must be soldered in the
last pass to minimize its exposure to thermal stress.
Solder Heat Shift
Distribution, VREF (%)
The materials used in the manufacture of the
REF35-Q1 have differing coefficients of thermal expansion, resulting in stress on the device
die when the part is heated. Mechanical and thermal stress on the device die can cause the
output voltages to shift, degrading the initial accuracy specifications of the product.
Reflow soldering is a common cause of this error.To illustrate this effect, a total of 32 devices
were soldered on one printed circuit board using lead-free solder paste and the paste
manufacturer suggested reflow profile. shows the reflow profile. The printed circuit board is comprised of FR4 material. The
board thickness is 1.66 mm and the area is 174 mm × 135 mm.
Reflow
Profile
Reflow
ProfileThe reference output voltage is measured before
and after the reflow process; shows the typical shift. Although all tested units exhibit very low shifts (< 0.03%),
higher shifts are also possible depending on the size, thickness, and material of the
printed circuit board (PCB). An important note is that the histograms display the typical
shift for exposure to a single reflow profile. Exposure to multiple reflows, as is common on
PCBs with surface-mount components on both sides, causes additional shifts in the output
bias voltage. If the PCB is exposed to multiple reflows, the device must be soldered in the
last pass to minimize its exposure to thermal stress.
Solder Heat Shift
Distribution, VREF (%)
Solder Heat Shift
Distribution, VREF (%)REF
Temperature Coefficient
The REF35-Q1 is designed and tested for a low
output voltage temperature coefficient, which is defined as the change in output
voltage over temperature. The temperature coefficient is calculated using the box
method in which a box is formed by the minimum/maximum limits for the nominal output
voltage over the operating temperature range. REF35-Q1 has a low maximum temperature
coefficient of 15 ppm/°C from –40°C to +125°C. The box method specifies limits for
the temperature error but does not specify the exact shape and slope of the device
under test. Due to temperature curvature correction to achieve low-temperature
drift, the temperature drift is expected to be non-linear. See TI's Analog Design
Journal,
Precision voltage references
, for more information on the box
method. Use for the box method.
shows a typical voltage versus temperature curves for various reference voltages.
Output Voltage Drift Vs
Free-Air Temperature
Temperature Coefficient
The REF35-Q1 is designed and tested for a low
output voltage temperature coefficient, which is defined as the change in output
voltage over temperature. The temperature coefficient is calculated using the box
method in which a box is formed by the minimum/maximum limits for the nominal output
voltage over the operating temperature range. REF35-Q1 has a low maximum temperature
coefficient of 15 ppm/°C from –40°C to +125°C. The box method specifies limits for
the temperature error but does not specify the exact shape and slope of the device
under test. Due to temperature curvature correction to achieve low-temperature
drift, the temperature drift is expected to be non-linear. See TI's Analog Design
Journal,
Precision voltage references
, for more information on the box
method. Use for the box method.
shows a typical voltage versus temperature curves for various reference voltages.
Output Voltage Drift Vs
Free-Air Temperature
The REF35-Q1 is designed and tested for a low
output voltage temperature coefficient, which is defined as the change in output
voltage over temperature. The temperature coefficient is calculated using the box
method in which a box is formed by the minimum/maximum limits for the nominal output
voltage over the operating temperature range. REF35-Q1 has a low maximum temperature
coefficient of 15 ppm/°C from –40°C to +125°C. The box method specifies limits for
the temperature error but does not specify the exact shape and slope of the device
under test. Due to temperature curvature correction to achieve low-temperature
drift, the temperature drift is expected to be non-linear. See TI's Analog Design
Journal,
Precision voltage references
, for more information on the box
method. Use for the box method.
shows a typical voltage versus temperature curves for various reference voltages.
Output Voltage Drift Vs
Free-Air Temperature
The REF35-Q1 is designed and tested for a low
output voltage temperature coefficient, which is defined as the change in output
voltage over temperature. The temperature coefficient is calculated using the box
method in which a box is formed by the minimum/maximum limits for the nominal output
voltage over the operating temperature range. REF35-Q1 has a low maximum temperature
coefficient of 15 ppm/°C from –40°C to +125°C. The box method specifies limits for
the temperature error but does not specify the exact shape and slope of the device
under test. Due to temperature curvature correction to achieve low-temperature
drift, the temperature drift is expected to be non-linear. See TI's Analog Design
Journal,
Precision voltage references
, for more information on the box
method. Use for the box method.
Precision voltage references
Precision voltage references
shows a typical voltage versus temperature curves for various reference voltages.
Output Voltage Drift Vs
Free-Air Temperature
Output Voltage Drift Vs
Free-Air Temperature
Long-Term Stability
One of the key performance parameters of the
REF35-Q1 references is long-term stability also known as long-term
drift. The long-term stability value is tested in a typical setup
that reflects standard PCB board manufacturing practices. The boards
are made of standard FR4 material and the board does not have
special cuts or grooves around the devices to relieve the mechanical
stress of the PCB. The devices and boards in this test do not
undergo high temperature burn in post-soldering prior to testing.
These conditions reflect a real world use case scenario and common
manufacturing techniques.
During the long-term stability
testing, precautions are taken to ensure that only the long-term stability drift is
being measured. The boards are maintained at 35°C in an oil bath. The oil bath
ensures that the temperature is constant across the device over time compared to an
air oven. The measurements are captured every 30 minutes with a calibrated 8.5 digit
multimeter.
The typical long-term stability characteristic is
expressed as a deviation of the reference voltage output over
time.
shows the typical drift value for the REF35-Q1 in 6-pin SOT-23
package is 30 ppm from 0 to 1000 hours. It is important to
understand that long-term stability is not ensured by design and
that the value is typical. The REF35-Q1 will experience the highest
drift in the initial 1000 hr. Subsequent deviation is typically
lower than first 1000 hr.
Long Term Stability - 1000 hours
(VREF)
Long-Term Stability
One of the key performance parameters of the
REF35-Q1 references is long-term stability also known as long-term
drift. The long-term stability value is tested in a typical setup
that reflects standard PCB board manufacturing practices. The boards
are made of standard FR4 material and the board does not have
special cuts or grooves around the devices to relieve the mechanical
stress of the PCB. The devices and boards in this test do not
undergo high temperature burn in post-soldering prior to testing.
These conditions reflect a real world use case scenario and common
manufacturing techniques.
During the long-term stability
testing, precautions are taken to ensure that only the long-term stability drift is
being measured. The boards are maintained at 35°C in an oil bath. The oil bath
ensures that the temperature is constant across the device over time compared to an
air oven. The measurements are captured every 30 minutes with a calibrated 8.5 digit
multimeter.
The typical long-term stability characteristic is
expressed as a deviation of the reference voltage output over
time.
shows the typical drift value for the REF35-Q1 in 6-pin SOT-23
package is 30 ppm from 0 to 1000 hours. It is important to
understand that long-term stability is not ensured by design and
that the value is typical. The REF35-Q1 will experience the highest
drift in the initial 1000 hr. Subsequent deviation is typically
lower than first 1000 hr.
Long Term Stability - 1000 hours
(VREF)
One of the key performance parameters of the
REF35-Q1 references is long-term stability also known as long-term
drift. The long-term stability value is tested in a typical setup
that reflects standard PCB board manufacturing practices. The boards
are made of standard FR4 material and the board does not have
special cuts or grooves around the devices to relieve the mechanical
stress of the PCB. The devices and boards in this test do not
undergo high temperature burn in post-soldering prior to testing.
These conditions reflect a real world use case scenario and common
manufacturing techniques.
During the long-term stability
testing, precautions are taken to ensure that only the long-term stability drift is
being measured. The boards are maintained at 35°C in an oil bath. The oil bath
ensures that the temperature is constant across the device over time compared to an
air oven. The measurements are captured every 30 minutes with a calibrated 8.5 digit
multimeter.
The typical long-term stability characteristic is
expressed as a deviation of the reference voltage output over
time.
shows the typical drift value for the REF35-Q1 in 6-pin SOT-23
package is 30 ppm from 0 to 1000 hours. It is important to
understand that long-term stability is not ensured by design and
that the value is typical. The REF35-Q1 will experience the highest
drift in the initial 1000 hr. Subsequent deviation is typically
lower than first 1000 hr.
Long Term Stability - 1000 hours
(VREF)
One of the key performance parameters of the
REF35-Q1 references is long-term stability also known as long-term
drift. The long-term stability value is tested in a typical setup
that reflects standard PCB board manufacturing practices. The boards
are made of standard FR4 material and the board does not have
special cuts or grooves around the devices to relieve the mechanical
stress of the PCB. The devices and boards in this test do not
undergo high temperature burn in post-soldering prior to testing.
These conditions reflect a real world use case scenario and common
manufacturing techniques.During the long-term stability
testing, precautions are taken to ensure that only the long-term stability drift is
being measured. The boards are maintained at 35°C in an oil bath. The oil bath
ensures that the temperature is constant across the device over time compared to an
air oven. The measurements are captured every 30 minutes with a calibrated 8.5 digit
multimeter.The typical long-term stability characteristic is
expressed as a deviation of the reference voltage output over
time.
shows the typical drift value for the REF35-Q1 in 6-pin SOT-23
package is 30 ppm from 0 to 1000 hours. It is important to
understand that long-term stability is not ensured by design and
that the value is typical. The REF35-Q1 will experience the highest
drift in the initial 1000 hr. Subsequent deviation is typically
lower than first 1000 hr.
Long Term Stability - 1000 hours
(VREF)
Long Term Stability - 1000 hours
(VREF)REF
Thermal Hysteresis
Thermal hysteresis is measured with the REF35-Q1
soldered to a PCB, similar to a real-world application. Thermal hysteresis for the
device is defined as the change in output voltage after operating the device at
25°C, cycling the device through the specified temperature range, and returning to
25°C. The PCB was baked at 150°C for 30 minutes before thermal hysteresis was
measured. Use to calculate the thermal hysteresis.
where
VHYST = thermal hysteresis (in units of ppm)
VNOM = the specified output voltage
VPRE = output voltage measured at 25°C pre-temperature cycling
VPOST = output voltage measured after
the device has cycled from 25°C through the specified temperature range of –40°C
to +125°C and returns to 25°C.
and show the
typical thermal hysteresis distribution across various temperature ranges in two
cycles.
Thermal Hysteresis
Distribution
-40ºC to 125ºC, Cycle 1
Thermal Hysteresis
Distribution
-40ºC to 125ºC, Cycle 2
Thermal Hysteresis
Thermal hysteresis is measured with the REF35-Q1
soldered to a PCB, similar to a real-world application. Thermal hysteresis for the
device is defined as the change in output voltage after operating the device at
25°C, cycling the device through the specified temperature range, and returning to
25°C. The PCB was baked at 150°C for 30 minutes before thermal hysteresis was
measured. Use to calculate the thermal hysteresis.
where
VHYST = thermal hysteresis (in units of ppm)
VNOM = the specified output voltage
VPRE = output voltage measured at 25°C pre-temperature cycling
VPOST = output voltage measured after
the device has cycled from 25°C through the specified temperature range of –40°C
to +125°C and returns to 25°C.
and show the
typical thermal hysteresis distribution across various temperature ranges in two
cycles.
Thermal Hysteresis
Distribution
-40ºC to 125ºC, Cycle 1
Thermal Hysteresis
Distribution
-40ºC to 125ºC, Cycle 2
Thermal hysteresis is measured with the REF35-Q1
soldered to a PCB, similar to a real-world application. Thermal hysteresis for the
device is defined as the change in output voltage after operating the device at
25°C, cycling the device through the specified temperature range, and returning to
25°C. The PCB was baked at 150°C for 30 minutes before thermal hysteresis was
measured. Use to calculate the thermal hysteresis.
where
VHYST = thermal hysteresis (in units of ppm)
VNOM = the specified output voltage
VPRE = output voltage measured at 25°C pre-temperature cycling
VPOST = output voltage measured after
the device has cycled from 25°C through the specified temperature range of –40°C
to +125°C and returns to 25°C.
and show the
typical thermal hysteresis distribution across various temperature ranges in two
cycles.
Thermal Hysteresis
Distribution
-40ºC to 125ºC, Cycle 1
Thermal Hysteresis
Distribution
-40ºC to 125ºC, Cycle 2
Thermal hysteresis is measured with the REF35-Q1
soldered to a PCB, similar to a real-world application. Thermal hysteresis for the
device is defined as the change in output voltage after operating the device at
25°C, cycling the device through the specified temperature range, and returning to
25°C. The PCB was baked at 150°C for 30 minutes before thermal hysteresis was
measured. Use to calculate the thermal hysteresis.
where
VHYST = thermal hysteresis (in units of ppm)
VNOM = the specified output voltage
VPRE = output voltage measured at 25°C pre-temperature cycling
VPOST = output voltage measured after
the device has cycled from 25°C through the specified temperature range of –40°C
to +125°C and returns to 25°C.
VHYST = thermal hysteresis (in units of ppm)HYSTVNOM = the specified output voltageNOMVPRE = output voltage measured at 25°C pre-temperature cyclingPREVPOST = output voltage measured after
the device has cycled from 25°C through the specified temperature range of –40°C
to +125°C and returns to 25°C.POST
and show the
typical thermal hysteresis distribution across various temperature ranges in two
cycles.
Thermal Hysteresis
Distribution
-40ºC to 125ºC, Cycle 1
Thermal Hysteresis
Distribution
-40ºC to 125ºC, Cycle 2
Thermal Hysteresis
Distribution
-40ºC to 125ºC, Cycle 1
Thermal Hysteresis
Distribution
-40ºC to 125ºC, Cycle 1
Thermal Hysteresis
Distribution
-40ºC to 125ºC, Cycle 2
Thermal Hysteresis
Distribution
-40ºC to 125ºC, Cycle 2
Noise Performance
The reference pin output noise is categorized as
low frequency and broadband noise. The following sections describe
these categories in detail.
Low-Frequency (1/f) Noise
Flicker noise, also known as 1/f noise, is a
low-frequency noise that affects the device output voltage which can affect
precision measurements in ADCs. This noise increases proportionally with output
voltage and operating temperature. The noise is measured by filtering the output
from 0.1 Hz to 10 Hz. The 1/f noise is an extremely low value, therefore the
frequency of interest must be amplified and band-pass filtered. This is done by
using a high-pass filter to block the DC voltage. The resulting noise is then
amplified by a gain of 1000. The bandpass filter is created by a series of high-pass
and low-pass filter that adds additional gain to make it more visible on a
oscilloscope as shown in . shows
the effect of flicker noise over 10 second. Flicker noise must be tested in a
Faraday cage enclosure to block environmental noise.
Low-Frequency (1/f) Noise Test
Setup
0.1 Hz to 10 Hz Voltage
Noise
shows the
typical 1/f noise (0.1 Hz to 10 Hz) distribution across various load conditions. The
REF35-Q1 device also offers noise reduction functionality by adding an optional
capacitor between NR (pin 5) and ground pins.
shows the typical 1/f noise (0.1 Hz to 10 Hz) distribution across REF35-Q1
devices with various capacitance between NR pin and GND.
0.1 Hz to 10 Hz Noise Distribution vs Load
Conditions
0.1 Hz to 10 Hz Noise Distribution vs NR
Capacitance
Broadband Noise
Broadband noise is a noise that appears at
higher frequency compared to 1/f noise. The broadband noise is measured by high-pass
filtering the output of the reference device, followed by a gain stage and measuring
the result on a spectrum analyzer as shown in
Broadband Noise Test
Setup
For noise sensitive designs, a low-pass filter can
be used to reduce broadband noise output noise levels by removing the high frequency
components. When designing a low-pass filter, take special care to make sure the
output impedance of the filter does not degrade AC performance. This can occur in RC
low-pass filters where a large series resistance can impact the load transients due
to output current fluctuations. The REF35-Q1 device also offers noise reduction
functionality by adding an optional capacitor between NR (pin 5) and ground pins.
and
show
the noise spectrum for REF35250 and REF35500 devices respectively across various NR
pin capacitance.
Noise Spectrum 10 Hz to 100 kHz
(VREF = 2.5 V)
Noise Spectrum 10 Hz to 100 kHz
(VREF = 5 V)
Noise Performance
The reference pin output noise is categorized as
low frequency and broadband noise. The following sections describe
these categories in detail.
The reference pin output noise is categorized as
low frequency and broadband noise. The following sections describe
these categories in detail.
The reference pin output noise is categorized as
low frequency and broadband noise. The following sections describe
these categories in detail.
Low-Frequency (1/f) Noise
Flicker noise, also known as 1/f noise, is a
low-frequency noise that affects the device output voltage which can affect
precision measurements in ADCs. This noise increases proportionally with output
voltage and operating temperature. The noise is measured by filtering the output
from 0.1 Hz to 10 Hz. The 1/f noise is an extremely low value, therefore the
frequency of interest must be amplified and band-pass filtered. This is done by
using a high-pass filter to block the DC voltage. The resulting noise is then
amplified by a gain of 1000. The bandpass filter is created by a series of high-pass
and low-pass filter that adds additional gain to make it more visible on a
oscilloscope as shown in . shows
the effect of flicker noise over 10 second. Flicker noise must be tested in a
Faraday cage enclosure to block environmental noise.
Low-Frequency (1/f) Noise Test
Setup
0.1 Hz to 10 Hz Voltage
Noise
shows the
typical 1/f noise (0.1 Hz to 10 Hz) distribution across various load conditions. The
REF35-Q1 device also offers noise reduction functionality by adding an optional
capacitor between NR (pin 5) and ground pins.
shows the typical 1/f noise (0.1 Hz to 10 Hz) distribution across REF35-Q1
devices with various capacitance between NR pin and GND.
0.1 Hz to 10 Hz Noise Distribution vs Load
Conditions
0.1 Hz to 10 Hz Noise Distribution vs NR
Capacitance
Low-Frequency (1/f) Noise
Flicker noise, also known as 1/f noise, is a
low-frequency noise that affects the device output voltage which can affect
precision measurements in ADCs. This noise increases proportionally with output
voltage and operating temperature. The noise is measured by filtering the output
from 0.1 Hz to 10 Hz. The 1/f noise is an extremely low value, therefore the
frequency of interest must be amplified and band-pass filtered. This is done by
using a high-pass filter to block the DC voltage. The resulting noise is then
amplified by a gain of 1000. The bandpass filter is created by a series of high-pass
and low-pass filter that adds additional gain to make it more visible on a
oscilloscope as shown in . shows
the effect of flicker noise over 10 second. Flicker noise must be tested in a
Faraday cage enclosure to block environmental noise.
Low-Frequency (1/f) Noise Test
Setup
0.1 Hz to 10 Hz Voltage
Noise
shows the
typical 1/f noise (0.1 Hz to 10 Hz) distribution across various load conditions. The
REF35-Q1 device also offers noise reduction functionality by adding an optional
capacitor between NR (pin 5) and ground pins.
shows the typical 1/f noise (0.1 Hz to 10 Hz) distribution across REF35-Q1
devices with various capacitance between NR pin and GND.
0.1 Hz to 10 Hz Noise Distribution vs Load
Conditions
0.1 Hz to 10 Hz Noise Distribution vs NR
Capacitance
Flicker noise, also known as 1/f noise, is a
low-frequency noise that affects the device output voltage which can affect
precision measurements in ADCs. This noise increases proportionally with output
voltage and operating temperature. The noise is measured by filtering the output
from 0.1 Hz to 10 Hz. The 1/f noise is an extremely low value, therefore the
frequency of interest must be amplified and band-pass filtered. This is done by
using a high-pass filter to block the DC voltage. The resulting noise is then
amplified by a gain of 1000. The bandpass filter is created by a series of high-pass
and low-pass filter that adds additional gain to make it more visible on a
oscilloscope as shown in . shows
the effect of flicker noise over 10 second. Flicker noise must be tested in a
Faraday cage enclosure to block environmental noise.
Low-Frequency (1/f) Noise Test
Setup
0.1 Hz to 10 Hz Voltage
Noise
shows the
typical 1/f noise (0.1 Hz to 10 Hz) distribution across various load conditions. The
REF35-Q1 device also offers noise reduction functionality by adding an optional
capacitor between NR (pin 5) and ground pins.
shows the typical 1/f noise (0.1 Hz to 10 Hz) distribution across REF35-Q1
devices with various capacitance between NR pin and GND.
0.1 Hz to 10 Hz Noise Distribution vs Load
Conditions
0.1 Hz to 10 Hz Noise Distribution vs NR
Capacitance
Flicker noise, also known as 1/f noise, is a
low-frequency noise that affects the device output voltage which can affect
precision measurements in ADCs. This noise increases proportionally with output
voltage and operating temperature. The noise is measured by filtering the output
from 0.1 Hz to 10 Hz. The 1/f noise is an extremely low value, therefore the
frequency of interest must be amplified and band-pass filtered. This is done by
using a high-pass filter to block the DC voltage. The resulting noise is then
amplified by a gain of 1000. The bandpass filter is created by a series of high-pass
and low-pass filter that adds additional gain to make it more visible on a
oscilloscope as shown in . shows
the effect of flicker noise over 10 second. Flicker noise must be tested in a
Faraday cage enclosure to block environmental noise.
Low-Frequency (1/f) Noise Test
Setup
Low-Frequency (1/f) Noise Test
Setup
0.1 Hz to 10 Hz Voltage
Noise
0.1 Hz to 10 Hz Voltage
Noise
shows the
typical 1/f noise (0.1 Hz to 10 Hz) distribution across various load conditions. The
REF35-Q1 device also offers noise reduction functionality by adding an optional
capacitor between NR (pin 5) and ground pins.
shows the typical 1/f noise (0.1 Hz to 10 Hz) distribution across REF35-Q1
devices with various capacitance between NR pin and GND.
0.1 Hz to 10 Hz Noise Distribution vs Load
Conditions
0.1 Hz to 10 Hz Noise Distribution vs NR
Capacitance
0.1 Hz to 10 Hz Noise Distribution vs Load
Conditions
0.1 Hz to 10 Hz Noise Distribution vs Load
Conditions
0.1 Hz to 10 Hz Noise Distribution vs NR
Capacitance
0.1 Hz to 10 Hz Noise Distribution vs NR
Capacitance
Broadband Noise
Broadband noise is a noise that appears at
higher frequency compared to 1/f noise. The broadband noise is measured by high-pass
filtering the output of the reference device, followed by a gain stage and measuring
the result on a spectrum analyzer as shown in
Broadband Noise Test
Setup
For noise sensitive designs, a low-pass filter can
be used to reduce broadband noise output noise levels by removing the high frequency
components. When designing a low-pass filter, take special care to make sure the
output impedance of the filter does not degrade AC performance. This can occur in RC
low-pass filters where a large series resistance can impact the load transients due
to output current fluctuations. The REF35-Q1 device also offers noise reduction
functionality by adding an optional capacitor between NR (pin 5) and ground pins.
and
show
the noise spectrum for REF35250 and REF35500 devices respectively across various NR
pin capacitance.
Noise Spectrum 10 Hz to 100 kHz
(VREF = 2.5 V)
Noise Spectrum 10 Hz to 100 kHz
(VREF = 5 V)
Broadband Noise
Broadband noise is a noise that appears at
higher frequency compared to 1/f noise. The broadband noise is measured by high-pass
filtering the output of the reference device, followed by a gain stage and measuring
the result on a spectrum analyzer as shown in
Broadband Noise Test
Setup
For noise sensitive designs, a low-pass filter can
be used to reduce broadband noise output noise levels by removing the high frequency
components. When designing a low-pass filter, take special care to make sure the
output impedance of the filter does not degrade AC performance. This can occur in RC
low-pass filters where a large series resistance can impact the load transients due
to output current fluctuations. The REF35-Q1 device also offers noise reduction
functionality by adding an optional capacitor between NR (pin 5) and ground pins.
and
show
the noise spectrum for REF35250 and REF35500 devices respectively across various NR
pin capacitance.
Noise Spectrum 10 Hz to 100 kHz
(VREF = 2.5 V)
Noise Spectrum 10 Hz to 100 kHz
(VREF = 5 V)
Broadband noise is a noise that appears at
higher frequency compared to 1/f noise. The broadband noise is measured by high-pass
filtering the output of the reference device, followed by a gain stage and measuring
the result on a spectrum analyzer as shown in
Broadband Noise Test
Setup
For noise sensitive designs, a low-pass filter can
be used to reduce broadband noise output noise levels by removing the high frequency
components. When designing a low-pass filter, take special care to make sure the
output impedance of the filter does not degrade AC performance. This can occur in RC
low-pass filters where a large series resistance can impact the load transients due
to output current fluctuations. The REF35-Q1 device also offers noise reduction
functionality by adding an optional capacitor between NR (pin 5) and ground pins.
and
show
the noise spectrum for REF35250 and REF35500 devices respectively across various NR
pin capacitance.
Noise Spectrum 10 Hz to 100 kHz
(VREF = 2.5 V)
Noise Spectrum 10 Hz to 100 kHz
(VREF = 5 V)
Broadband noise is a noise that appears at
higher frequency compared to 1/f noise. The broadband noise is measured by high-pass
filtering the output of the reference device, followed by a gain stage and measuring
the result on a spectrum analyzer as shown in
Broadband Noise Test
Setup
Broadband Noise Test
SetupFor noise sensitive designs, a low-pass filter can
be used to reduce broadband noise output noise levels by removing the high frequency
components. When designing a low-pass filter, take special care to make sure the
output impedance of the filter does not degrade AC performance. This can occur in RC
low-pass filters where a large series resistance can impact the load transients due
to output current fluctuations. The REF35-Q1 device also offers noise reduction
functionality by adding an optional capacitor between NR (pin 5) and ground pins.
and
show
the noise spectrum for REF35250 and REF35500 devices respectively across various NR
pin capacitance.
Noise Spectrum 10 Hz to 100 kHz
(VREF = 2.5 V)
Noise Spectrum 10 Hz to 100 kHz
(VREF = 5 V)
Noise Spectrum 10 Hz to 100 kHz
(VREF = 2.5 V)
Noise Spectrum 10 Hz to 100 kHz
(VREF = 2.5 V)REF
Noise Spectrum 10 Hz to 100 kHz
(VREF = 5 V)
Noise Spectrum 10 Hz to 100 kHz
(VREF = 5 V)REF
Power Dissipation
The REF35-Q1 voltage references are capable of
source up to 10 mA and sink up to 5 mA of load current across the rated input
voltage range. However, when used in applications subject to high ambient
temperatures, the input voltage and load current must be carefully monitored to
ensure that the device does not exceeded its maximum power dissipation rating. The
maximum power dissipation of the device can be calculated with #GUID-A65942E4-6508-43BD-B5EB-468A2E1B9E35/T4594395-4:
where
PD is the device power dissipation
TJ is the device junction temperature
TA is the ambient temperature
RθJA is the package (junction-to-air) thermal resistance
Because of this relationship, acceptable load current in high temperature conditions may be less than the maximum current-sourcing capability of the device. In no case should the device be operated outside of its maximum power rating because doing so can result in premature failure or permanent damage to the device.
Power Dissipation
The REF35-Q1 voltage references are capable of
source up to 10 mA and sink up to 5 mA of load current across the rated input
voltage range. However, when used in applications subject to high ambient
temperatures, the input voltage and load current must be carefully monitored to
ensure that the device does not exceeded its maximum power dissipation rating. The
maximum power dissipation of the device can be calculated with #GUID-A65942E4-6508-43BD-B5EB-468A2E1B9E35/T4594395-4:
where
PD is the device power dissipation
TJ is the device junction temperature
TA is the ambient temperature
RθJA is the package (junction-to-air) thermal resistance
Because of this relationship, acceptable load current in high temperature conditions may be less than the maximum current-sourcing capability of the device. In no case should the device be operated outside of its maximum power rating because doing so can result in premature failure or permanent damage to the device.
The REF35-Q1 voltage references are capable of
source up to 10 mA and sink up to 5 mA of load current across the rated input
voltage range. However, when used in applications subject to high ambient
temperatures, the input voltage and load current must be carefully monitored to
ensure that the device does not exceeded its maximum power dissipation rating. The
maximum power dissipation of the device can be calculated with #GUID-A65942E4-6508-43BD-B5EB-468A2E1B9E35/T4594395-4:
where
PD is the device power dissipation
TJ is the device junction temperature
TA is the ambient temperature
RθJA is the package (junction-to-air) thermal resistance
Because of this relationship, acceptable load current in high temperature conditions may be less than the maximum current-sourcing capability of the device. In no case should the device be operated outside of its maximum power rating because doing so can result in premature failure or permanent damage to the device.
The REF35-Q1 voltage references are capable of
source up to 10 mA and sink up to 5 mA of load current across the rated input
voltage range. However, when used in applications subject to high ambient
temperatures, the input voltage and load current must be carefully monitored to
ensure that the device does not exceeded its maximum power dissipation rating. The
maximum power dissipation of the device can be calculated with #GUID-A65942E4-6508-43BD-B5EB-468A2E1B9E35/T4594395-4:#GUID-A65942E4-6508-43BD-B5EB-468A2E1B9E35/T4594395-4
where
PD is the device power dissipation
TJ is the device junction temperature
TA is the ambient temperature
RθJA is the package (junction-to-air) thermal resistance
PD is the device power dissipationDTJ is the device junction temperatureJTA is the ambient temperatureARθJA is the package (junction-to-air) thermal resistanceθJABecause of this relationship, acceptable load current in high temperature conditions may be less than the maximum current-sourcing capability of the device. In no case should the device be operated outside of its maximum power rating because doing so can result in premature failure or permanent damage to the device.
Detailed Description
Overview
The REF35-Q1 is family of ultralow current,
low-noise, precision band-gap voltage references
that are specifically designed for excellent
initial voltage accuracy and drift. The
Functional Block Diagram
is a
simplified block diagram of the REF35-Q1 showing
basic band-gap topology.
Functional Block Diagram
Feature Description
Supply Voltage
The REF35-Q1 family of references features an
extremely low dropout voltage. For 10 mA loaded conditions, a maximum dropout
voltage is 250 mV. shows a typical dropout voltage (VDO) versus load current. The device
supports operation with input voltage range from VREF + VDO to
6 V. The typical quiescent current is 680 nA and maximum quiescent current over
temperature is only 2.6 μA. The low dropout voltage coupled with ultral-ow current
enable the operation across multiple battery powered applications.
EN Pin
The REF35-Q1 family supports device enable and
disable functionality through logic level control on EN pin. The EN
pin of REF35-Q1 does not use an internal pull-up resistor. Instead,
the pin uses new 'clean EN' technology. This allows the EN pin to be
in a no connect condition at start-up, and no extra current is drawn
from the supply when the EN pin is pulled low in shutdown mode. When
EN pin is pulled high or left unconnected, the device is in active
mode. When EN pin is drive by an open-drain outputs, a pull-up
resistor to VIN is required. The device must be in active mode for
normal operation. The EN pin must not be pulled higher than VIN
supply voltage.
The device can be placed in shutdown mode by
pulling the EN pin low. When in shutdown mode, the output of the device becomes high
impedance and the quiescent current of the device drops to 50 nA.
Also note that for applications where EN pin is
no-connect, total parasitic capacitance on EN pin should be
restricted within 30 pF.
See the
for logic high and logic low voltage levels.
NR Pin
The REF35-Q1 pin allows access to the band gap
through the NR pin. Placing a capacitor from the NR pin to GND creates a low-pass
filter in combination with the internal resistance of 60 kΩ. Leakage of the
capacitance directly impacts the accuracy and temperature drift. If NR functionality
is used, choose a low leakage capacitor. A capacitance of 1 μF creates a low-pass
filter with corner frequency around 2.7 Hz. Such a filter decreases the overall
noise on the VREF pin. Higher capacitance results in a lower filter cut off
frequency, further reducing output noise. Please note, using the capacitor on NR pin
also increases start-up time.
Device Functional Modes
Basic Connections
shows the typical connections for the REF35-Q1.
TI recommends a supply bypass capacitor
(CIN) ranging from 0.1 μF to 10 μF. A
0.1 μF to 10 μF output capacitor (CL)
must be connected from REF to GND. The equivalent
series resistance (ESR) value of CL
must be lower than 400 mΩ to ensure output
stability.
Basic Connections
Start-Up
shows the start-up behavior of REF35250 device
with 1 μF load capacitance. REF35-Q1 device
ensures the output voltage settles to the expected
output voltage within specified accuracy without
oscillations. The start-up time is dependent on
the output voltage variant, output capacitance and
NR pin capacitance. Higher capcitance leads to
longer start-up time.
REF35250 Start-Up Behavior,
C
L
= 1 μF
Output Transient Behavior
The REF35-Q1 output buffer is capable of sourcing
10 mA load current as well as sink 5 mA of load current. The output stage is
designed using class AB architecture with ultra-low quiescent current. This
architecture avoids the dead zone around the no load condition. The output buffer
uses a fast start-up implementation to achieve 2ms typical turn-on time at
CL = 1 μF and no-load current condition.
and show the
output settling behavior for light load transient and high load transient
respectively.
Load Transient Response 0
μA to 100 μA, C
REF
= 1 μF
Load Transient Response 1
mA to 10 mA, C
REF
= 1 μF
Detailed Description
Overview
The REF35-Q1 is family of ultralow current,
low-noise, precision band-gap voltage references
that are specifically designed for excellent
initial voltage accuracy and drift. The
Functional Block Diagram
is a
simplified block diagram of the REF35-Q1 showing
basic band-gap topology.
Overview
The REF35-Q1 is family of ultralow current,
low-noise, precision band-gap voltage references
that are specifically designed for excellent
initial voltage accuracy and drift. The
Functional Block Diagram
is a
simplified block diagram of the REF35-Q1 showing
basic band-gap topology.
The REF35-Q1 is family of ultralow current,
low-noise, precision band-gap voltage references
that are specifically designed for excellent
initial voltage accuracy and drift. The
Functional Block Diagram
is a
simplified block diagram of the REF35-Q1 showing
basic band-gap topology.
The REF35-Q1 is family of ultralow current,
low-noise, precision band-gap voltage references
that are specifically designed for excellent
initial voltage accuracy and drift. The
Functional Block Diagram
is a
simplified block diagram of the REF35-Q1 showing
basic band-gap topology.
Functional Block Diagram
Functional Block Diagram
Functional Block Diagram
Functional Block Diagram
Feature Description
Supply Voltage
The REF35-Q1 family of references features an
extremely low dropout voltage. For 10 mA loaded conditions, a maximum dropout
voltage is 250 mV. shows a typical dropout voltage (VDO) versus load current. The device
supports operation with input voltage range from VREF + VDO to
6 V. The typical quiescent current is 680 nA and maximum quiescent current over
temperature is only 2.6 μA. The low dropout voltage coupled with ultral-ow current
enable the operation across multiple battery powered applications.
EN Pin
The REF35-Q1 family supports device enable and
disable functionality through logic level control on EN pin. The EN
pin of REF35-Q1 does not use an internal pull-up resistor. Instead,
the pin uses new 'clean EN' technology. This allows the EN pin to be
in a no connect condition at start-up, and no extra current is drawn
from the supply when the EN pin is pulled low in shutdown mode. When
EN pin is pulled high or left unconnected, the device is in active
mode. When EN pin is drive by an open-drain outputs, a pull-up
resistor to VIN is required. The device must be in active mode for
normal operation. The EN pin must not be pulled higher than VIN
supply voltage.
The device can be placed in shutdown mode by
pulling the EN pin low. When in shutdown mode, the output of the device becomes high
impedance and the quiescent current of the device drops to 50 nA.
Also note that for applications where EN pin is
no-connect, total parasitic capacitance on EN pin should be
restricted within 30 pF.
See the
for logic high and logic low voltage levels.
NR Pin
The REF35-Q1 pin allows access to the band gap
through the NR pin. Placing a capacitor from the NR pin to GND creates a low-pass
filter in combination with the internal resistance of 60 kΩ. Leakage of the
capacitance directly impacts the accuracy and temperature drift. If NR functionality
is used, choose a low leakage capacitor. A capacitance of 1 μF creates a low-pass
filter with corner frequency around 2.7 Hz. Such a filter decreases the overall
noise on the VREF pin. Higher capacitance results in a lower filter cut off
frequency, further reducing output noise. Please note, using the capacitor on NR pin
also increases start-up time.
Feature Description
Supply Voltage
The REF35-Q1 family of references features an
extremely low dropout voltage. For 10 mA loaded conditions, a maximum dropout
voltage is 250 mV. shows a typical dropout voltage (VDO) versus load current. The device
supports operation with input voltage range from VREF + VDO to
6 V. The typical quiescent current is 680 nA and maximum quiescent current over
temperature is only 2.6 μA. The low dropout voltage coupled with ultral-ow current
enable the operation across multiple battery powered applications.
Supply Voltage
The REF35-Q1 family of references features an
extremely low dropout voltage. For 10 mA loaded conditions, a maximum dropout
voltage is 250 mV. shows a typical dropout voltage (VDO) versus load current. The device
supports operation with input voltage range from VREF + VDO to
6 V. The typical quiescent current is 680 nA and maximum quiescent current over
temperature is only 2.6 μA. The low dropout voltage coupled with ultral-ow current
enable the operation across multiple battery powered applications.
The REF35-Q1 family of references features an
extremely low dropout voltage. For 10 mA loaded conditions, a maximum dropout
voltage is 250 mV. shows a typical dropout voltage (VDO) versus load current. The device
supports operation with input voltage range from VREF + VDO to
6 V. The typical quiescent current is 680 nA and maximum quiescent current over
temperature is only 2.6 μA. The low dropout voltage coupled with ultral-ow current
enable the operation across multiple battery powered applications.
The REF35-Q1 family of references features an
extremely low dropout voltage. For 10 mA loaded conditions, a maximum dropout
voltage is 250 mV. shows a typical dropout voltage (VDO) versus load current. The device
supports operation with input voltage range from VREF + VDO to
6 V. The typical quiescent current is 680 nA and maximum quiescent current over
temperature is only 2.6 μA. The low dropout voltage coupled with ultral-ow current
enable the operation across multiple battery powered applications.DOREFDO
EN Pin
The REF35-Q1 family supports device enable and
disable functionality through logic level control on EN pin. The EN
pin of REF35-Q1 does not use an internal pull-up resistor. Instead,
the pin uses new 'clean EN' technology. This allows the EN pin to be
in a no connect condition at start-up, and no extra current is drawn
from the supply when the EN pin is pulled low in shutdown mode. When
EN pin is pulled high or left unconnected, the device is in active
mode. When EN pin is drive by an open-drain outputs, a pull-up
resistor to VIN is required. The device must be in active mode for
normal operation. The EN pin must not be pulled higher than VIN
supply voltage.
The device can be placed in shutdown mode by
pulling the EN pin low. When in shutdown mode, the output of the device becomes high
impedance and the quiescent current of the device drops to 50 nA.
Also note that for applications where EN pin is
no-connect, total parasitic capacitance on EN pin should be
restricted within 30 pF.
See the
for logic high and logic low voltage levels.
EN Pin
The REF35-Q1 family supports device enable and
disable functionality through logic level control on EN pin. The EN
pin of REF35-Q1 does not use an internal pull-up resistor. Instead,
the pin uses new 'clean EN' technology. This allows the EN pin to be
in a no connect condition at start-up, and no extra current is drawn
from the supply when the EN pin is pulled low in shutdown mode. When
EN pin is pulled high or left unconnected, the device is in active
mode. When EN pin is drive by an open-drain outputs, a pull-up
resistor to VIN is required. The device must be in active mode for
normal operation. The EN pin must not be pulled higher than VIN
supply voltage.
The device can be placed in shutdown mode by
pulling the EN pin low. When in shutdown mode, the output of the device becomes high
impedance and the quiescent current of the device drops to 50 nA.
Also note that for applications where EN pin is
no-connect, total parasitic capacitance on EN pin should be
restricted within 30 pF.
See the
for logic high and logic low voltage levels.
The REF35-Q1 family supports device enable and
disable functionality through logic level control on EN pin. The EN
pin of REF35-Q1 does not use an internal pull-up resistor. Instead,
the pin uses new 'clean EN' technology. This allows the EN pin to be
in a no connect condition at start-up, and no extra current is drawn
from the supply when the EN pin is pulled low in shutdown mode. When
EN pin is pulled high or left unconnected, the device is in active
mode. When EN pin is drive by an open-drain outputs, a pull-up
resistor to VIN is required. The device must be in active mode for
normal operation. The EN pin must not be pulled higher than VIN
supply voltage.
The device can be placed in shutdown mode by
pulling the EN pin low. When in shutdown mode, the output of the device becomes high
impedance and the quiescent current of the device drops to 50 nA.
Also note that for applications where EN pin is
no-connect, total parasitic capacitance on EN pin should be
restricted within 30 pF.
See the
for logic high and logic low voltage levels.
The REF35-Q1 family supports device enable and
disable functionality through logic level control on EN pin. The EN
pin of REF35-Q1 does not use an internal pull-up resistor. Instead,
the pin uses new 'clean EN' technology. This allows the EN pin to be
in a no connect condition at start-up, and no extra current is drawn
from the supply when the EN pin is pulled low in shutdown mode. When
EN pin is pulled high or left unconnected, the device is in active
mode. When EN pin is drive by an open-drain outputs, a pull-up
resistor to VIN is required. The device must be in active mode for
normal operation. The EN pin must not be pulled higher than VIN
supply voltage. The device can be placed in shutdown mode by
pulling the EN pin low. When in shutdown mode, the output of the device becomes high
impedance and the quiescent current of the device drops to 50 nA.Also note that for applications where EN pin is
no-connect, total parasitic capacitance on EN pin should be
restricted within 30 pF.See the
for logic high and logic low voltage levels.
NR Pin
The REF35-Q1 pin allows access to the band gap
through the NR pin. Placing a capacitor from the NR pin to GND creates a low-pass
filter in combination with the internal resistance of 60 kΩ. Leakage of the
capacitance directly impacts the accuracy and temperature drift. If NR functionality
is used, choose a low leakage capacitor. A capacitance of 1 μF creates a low-pass
filter with corner frequency around 2.7 Hz. Such a filter decreases the overall
noise on the VREF pin. Higher capacitance results in a lower filter cut off
frequency, further reducing output noise. Please note, using the capacitor on NR pin
also increases start-up time.
NR Pin
The REF35-Q1 pin allows access to the band gap
through the NR pin. Placing a capacitor from the NR pin to GND creates a low-pass
filter in combination with the internal resistance of 60 kΩ. Leakage of the
capacitance directly impacts the accuracy and temperature drift. If NR functionality
is used, choose a low leakage capacitor. A capacitance of 1 μF creates a low-pass
filter with corner frequency around 2.7 Hz. Such a filter decreases the overall
noise on the VREF pin. Higher capacitance results in a lower filter cut off
frequency, further reducing output noise. Please note, using the capacitor on NR pin
also increases start-up time.
The REF35-Q1 pin allows access to the band gap
through the NR pin. Placing a capacitor from the NR pin to GND creates a low-pass
filter in combination with the internal resistance of 60 kΩ. Leakage of the
capacitance directly impacts the accuracy and temperature drift. If NR functionality
is used, choose a low leakage capacitor. A capacitance of 1 μF creates a low-pass
filter with corner frequency around 2.7 Hz. Such a filter decreases the overall
noise on the VREF pin. Higher capacitance results in a lower filter cut off
frequency, further reducing output noise. Please note, using the capacitor on NR pin
also increases start-up time.
The REF35-Q1 pin allows access to the band gap
through the NR pin. Placing a capacitor from the NR pin to GND creates a low-pass
filter in combination with the internal resistance of 60 kΩ. Leakage of the
capacitance directly impacts the accuracy and temperature drift. If NR functionality
is used, choose a low leakage capacitor. A capacitance of 1 μF creates a low-pass
filter with corner frequency around 2.7 Hz. Such a filter decreases the overall
noise on the VREF pin. Higher capacitance results in a lower filter cut off
frequency, further reducing output noise. Please note, using the capacitor on NR pin
also increases start-up time.
Device Functional Modes
Basic Connections
shows the typical connections for the REF35-Q1.
TI recommends a supply bypass capacitor
(CIN) ranging from 0.1 μF to 10 μF. A
0.1 μF to 10 μF output capacitor (CL)
must be connected from REF to GND. The equivalent
series resistance (ESR) value of CL
must be lower than 400 mΩ to ensure output
stability.
Basic Connections
Start-Up
shows the start-up behavior of REF35250 device
with 1 μF load capacitance. REF35-Q1 device
ensures the output voltage settles to the expected
output voltage within specified accuracy without
oscillations. The start-up time is dependent on
the output voltage variant, output capacitance and
NR pin capacitance. Higher capcitance leads to
longer start-up time.
REF35250 Start-Up Behavior,
C
L
= 1 μF
Output Transient Behavior
The REF35-Q1 output buffer is capable of sourcing
10 mA load current as well as sink 5 mA of load current. The output stage is
designed using class AB architecture with ultra-low quiescent current. This
architecture avoids the dead zone around the no load condition. The output buffer
uses a fast start-up implementation to achieve 2ms typical turn-on time at
CL = 1 μF and no-load current condition.
and show the
output settling behavior for light load transient and high load transient
respectively.
Load Transient Response 0
μA to 100 μA, C
REF
= 1 μF
Load Transient Response 1
mA to 10 mA, C
REF
= 1 μF
Device Functional Modes
Basic Connections
shows the typical connections for the REF35-Q1.
TI recommends a supply bypass capacitor
(CIN) ranging from 0.1 μF to 10 μF. A
0.1 μF to 10 μF output capacitor (CL)
must be connected from REF to GND. The equivalent
series resistance (ESR) value of CL
must be lower than 400 mΩ to ensure output
stability.
Basic Connections
Basic Connections
shows the typical connections for the REF35-Q1.
TI recommends a supply bypass capacitor
(CIN) ranging from 0.1 μF to 10 μF. A
0.1 μF to 10 μF output capacitor (CL)
must be connected from REF to GND. The equivalent
series resistance (ESR) value of CL
must be lower than 400 mΩ to ensure output
stability.
Basic Connections
shows the typical connections for the REF35-Q1.
TI recommends a supply bypass capacitor
(CIN) ranging from 0.1 μF to 10 μF. A
0.1 μF to 10 μF output capacitor (CL)
must be connected from REF to GND. The equivalent
series resistance (ESR) value of CL
must be lower than 400 mΩ to ensure output
stability.
Basic Connections
shows the typical connections for the REF35-Q1.
TI recommends a supply bypass capacitor
(CIN) ranging from 0.1 μF to 10 μF. A
0.1 μF to 10 μF output capacitor (CL)
must be connected from REF to GND. The equivalent
series resistance (ESR) value of CL
must be lower than 400 mΩ to ensure output
stability.INLL
Basic Connections
Basic Connections
Start-Up
shows the start-up behavior of REF35250 device
with 1 μF load capacitance. REF35-Q1 device
ensures the output voltage settles to the expected
output voltage within specified accuracy without
oscillations. The start-up time is dependent on
the output voltage variant, output capacitance and
NR pin capacitance. Higher capcitance leads to
longer start-up time.
REF35250 Start-Up Behavior,
C
L
= 1 μF
Start-Up
shows the start-up behavior of REF35250 device
with 1 μF load capacitance. REF35-Q1 device
ensures the output voltage settles to the expected
output voltage within specified accuracy without
oscillations. The start-up time is dependent on
the output voltage variant, output capacitance and
NR pin capacitance. Higher capcitance leads to
longer start-up time.
REF35250 Start-Up Behavior,
C
L
= 1 μF
shows the start-up behavior of REF35250 device
with 1 μF load capacitance. REF35-Q1 device
ensures the output voltage settles to the expected
output voltage within specified accuracy without
oscillations. The start-up time is dependent on
the output voltage variant, output capacitance and
NR pin capacitance. Higher capcitance leads to
longer start-up time.
REF35250 Start-Up Behavior,
C
L
= 1 μF
shows the start-up behavior of REF35250 device
with 1 μF load capacitance. REF35-Q1 device
ensures the output voltage settles to the expected
output voltage within specified accuracy without
oscillations. The start-up time is dependent on
the output voltage variant, output capacitance and
NR pin capacitance. Higher capcitance leads to
longer start-up time.
REF35250 Start-Up Behavior,
C
L
= 1 μF
REF35250 Start-Up Behavior,
C
L
= 1 μF
L
L
Output Transient Behavior
The REF35-Q1 output buffer is capable of sourcing
10 mA load current as well as sink 5 mA of load current. The output stage is
designed using class AB architecture with ultra-low quiescent current. This
architecture avoids the dead zone around the no load condition. The output buffer
uses a fast start-up implementation to achieve 2ms typical turn-on time at
CL = 1 μF and no-load current condition.
and show the
output settling behavior for light load transient and high load transient
respectively.
Load Transient Response 0
μA to 100 μA, C
REF
= 1 μF
Load Transient Response 1
mA to 10 mA, C
REF
= 1 μF
Output Transient Behavior
The REF35-Q1 output buffer is capable of sourcing
10 mA load current as well as sink 5 mA of load current. The output stage is
designed using class AB architecture with ultra-low quiescent current. This
architecture avoids the dead zone around the no load condition. The output buffer
uses a fast start-up implementation to achieve 2ms typical turn-on time at
CL = 1 μF and no-load current condition.
and show the
output settling behavior for light load transient and high load transient
respectively.
Load Transient Response 0
μA to 100 μA, C
REF
= 1 μF
Load Transient Response 1
mA to 10 mA, C
REF
= 1 μF
The REF35-Q1 output buffer is capable of sourcing
10 mA load current as well as sink 5 mA of load current. The output stage is
designed using class AB architecture with ultra-low quiescent current. This
architecture avoids the dead zone around the no load condition. The output buffer
uses a fast start-up implementation to achieve 2ms typical turn-on time at
CL = 1 μF and no-load current condition.
and show the
output settling behavior for light load transient and high load transient
respectively.
Load Transient Response 0
μA to 100 μA, C
REF
= 1 μF
Load Transient Response 1
mA to 10 mA, C
REF
= 1 μF
The REF35-Q1 output buffer is capable of sourcing
10 mA load current as well as sink 5 mA of load current. The output stage is
designed using class AB architecture with ultra-low quiescent current. This
architecture avoids the dead zone around the no load condition. The output buffer
uses a fast start-up implementation to achieve 2ms typical turn-on time at
CL = 1 μF and no-load current condition.L
and show the
output settling behavior for light load transient and high load transient
respectively.
Load Transient Response 0
μA to 100 μA, C
REF
= 1 μF
Load Transient Response 1
mA to 10 mA, C
REF
= 1 μF
Load Transient Response 0
μA to 100 μA, C
REF
= 1 μF
Load Transient Response 0
μA to 100 μA, C
REF
= 1 μF
REF
REF
Load Transient Response 1
mA to 10 mA, C
REF
= 1 μF
Load Transient Response 1
mA to 10 mA, C
REF
= 1 μF
REF
REF
Application and Implementation
Information in the following applications
sections is not part of the TI component
specification, and TI does not warrant its
accuracy or completeness. TI’s customers are
responsible for determining suitability of
components for their purposes. Customers should
validate and test their design implementation to
confirm system functionality.
Application Information
REF35-Q1 with low current consumption and class
leading performance specifcations is suitable reference for multiple applications.
The device can also be used as a precision low noise power supply to sensor or data
converter instead of traditional LDO or DC/DC based power supply. Basic applications
includes positive/negative voltage reference and data acquisition.
Typical Application: Negative Reference Voltage
For applications requiring a negative and positive
reference voltage, the REF35-Q1 and OPA188-Q1 can be used to provide a dual-supply
reference from a 5 V supply. shows the REF35250 used to provide a 2.5 V supply reference voltage. The low
drift performance of the REF35250-Q1 complements the low offset voltage and
low-drift of the OPA188-Q1 to provide an accurate solution for split-supply
applications. Take care to match the temperature coefficients of R1 and R2.
REF35-Q1 and OPA188-Q1 Create
Positive and Negative Reference Voltages
Typical Application: Precision Power Supply and
Reference
shows the basic configuration for the REF35-Q1 device as precision power supply
to ADS7038-Q1 data converter which uses its power supply AVDD as reference.
Connect bypass capacitors according to the guidelines in section.
Basic Reference
Connection
Design Requirements
A detailed design procedure is described based on a design example. For this design example, use the parameters listed in #GUID-DAF2896F-5326-4B26-9E60-EB6B4E8627BF/SBAS8049082 as the input parameters.
Design Example Parameters
DESIGN PARAMETER
VALUE
Input voltage range VIN
0 V - 5 V
Output resolution
12-bit
REF input capacitor
1 µF
REF output capacitor
10 µF
Detailed Design Procedure
Selection of Reference
The REF35500-Q1 reference is selected for this
design. The REF35500-Q1 device operates of very low quiescent current while offering
±0.05 % initial accuracy and very low noise. These parameters help improve system
accuracy as compared to external LDO based power supply. The 5 V reference voltage
supports the 0 V to 5 V input range specification.
Input and Output Capacitors
A 1 μF to 10 μF electrolytic or ceramic capacitor
can be connected to the input to improve transient response in
applications where the supply voltage may fluctuate.
A ceramic capacitor of at least a 0.1 μF must be
connected to the output to improve stability and help filter out
high frequency noise. Add an additional 10 μF capacitor in parallel
to improve transient performance in response to sudden changes in
load current; however, keep in mind that doing so increases the
start-up time of the device.
Best performance and stability is attained with
low-ESR, low-inductance ceramic chip-type output capacitors (X5R,
X7R, or similar). If using an electrolytic capacitor on the output,
place a 0.1 μF ceramic capacitor in parallel to reduce overall ESR
on the output. Place the input and output capacitors as close as
possible to the device.
Selection of ADC
ADS7038-Q1
12-bit 8 channel multiplexed ADC is chosen for
this application. The ADC offers low current
operation with averaging mode to increase the
resolution to 16-bit with internal averaging modes
while operating with slow sampling speed.
Application Curves
#GUID-CF45450E-B081-4939-875B-88E00F6CF550/TABLE_NRR_FLW_3RB shows the captured measurement results for various DC inputs. The ADC output is
captured and analyzed for output accuracy, code spread and sigma with REF35500-Q1 as
power supply vs LDO as power supply.
REF35-Q1 offers better accuracy and lower noise
than the LDO device at lower quiescent current. This results in lower error in
measurement as well as lower ADC output code variation across various OSR
seetings.
DC Input Performance Test
Results
INPUT V
ADC OSR SETTING
REF35500
LDO
ERROR
CODE SPREAD
ERROR
CODE SPREAD
1.0 V
0
0.01 mV
32 LSB
8.9 mV
48 LSB
8
0.3 mV
10 LSB
9.21 mV
16 LSB
128
0.38 mV
6 LSB
9.26 mV
6 LSB
2.5 V
0
0.69 mV
32 LSB
22.89 mV
64 LSB
8
1.44 mV
10 LSB
23.63 mV
18 LSB
128
1.17 mV
3 LSB
23.41 mV
5 LSB
4 V
0
2.27 mV
32 LSB
37.84 mV
48 LSB
8
3.01 mV
24 LSB
38.62 mV
24 LSB
128
2.46 mV
3 LSB
38.09 mV
17 LSB
Power Supply Recommendations
The REF35 family of references
feature an extremely low-dropout voltage. These references can be operated with
a supply of only 50 mV above the output voltage at no load. TI recommends a
supply bypass capacitor ranging between 0.1 µF to 10 µF.
Layout
Layout Guidelines
shows an example of a PCB layout for a data acquisition system using the REF35-Q1. Some
key considerations are:
Connect low-ESR, 0.1 μF ceramic bypass
capacitors at VIN, VREF of the REF35-Q1.
Decouple other active devices in the
system per the device specifications.
Using a solid ground plane helps
distribute heat and reduces electromagnetic interference (EMI) noise pickup.
Place the external components as close
to the device as possible.
Do not run sensitive analog traces in
parallel with digital traces. Avoid crossing digital and analog traces if possible, and
only make perpendicular crossings when absolutely necessary.
shows the pin compatibility with TI REF31xx series reference in the 3-pin SOT-23 package
when using the REF35xxx family footprint. You must rotate the REF31xx reference device by
180º before assembly.
Layout Examples
Layout Example
Pin Compatibility With
REF31xx
Application and Implementation
Information in the following applications
sections is not part of the TI component
specification, and TI does not warrant its
accuracy or completeness. TI’s customers are
responsible for determining suitability of
components for their purposes. Customers should
validate and test their design implementation to
confirm system functionality.
Information in the following applications
sections is not part of the TI component
specification, and TI does not warrant its
accuracy or completeness. TI’s customers are
responsible for determining suitability of
components for their purposes. Customers should
validate and test their design implementation to
confirm system functionality.
Information in the following applications
sections is not part of the TI component
specification, and TI does not warrant its
accuracy or completeness. TI’s customers are
responsible for determining suitability of
components for their purposes. Customers should
validate and test their design implementation to
confirm system functionality.
Application Information
REF35-Q1 with low current consumption and class
leading performance specifcations is suitable reference for multiple applications.
The device can also be used as a precision low noise power supply to sensor or data
converter instead of traditional LDO or DC/DC based power supply. Basic applications
includes positive/negative voltage reference and data acquisition.
Application Information
REF35-Q1 with low current consumption and class
leading performance specifcations is suitable reference for multiple applications.
The device can also be used as a precision low noise power supply to sensor or data
converter instead of traditional LDO or DC/DC based power supply. Basic applications
includes positive/negative voltage reference and data acquisition.
REF35-Q1 with low current consumption and class
leading performance specifcations is suitable reference for multiple applications.
The device can also be used as a precision low noise power supply to sensor or data
converter instead of traditional LDO or DC/DC based power supply. Basic applications
includes positive/negative voltage reference and data acquisition.
REF35-Q1 with low current consumption and class
leading performance specifcations is suitable reference for multiple applications.
The device can also be used as a precision low noise power supply to sensor or data
converter instead of traditional LDO or DC/DC based power supply. Basic applications
includes positive/negative voltage reference and data acquisition.
Typical Application: Negative Reference Voltage
For applications requiring a negative and positive
reference voltage, the REF35-Q1 and OPA188-Q1 can be used to provide a dual-supply
reference from a 5 V supply. shows the REF35250 used to provide a 2.5 V supply reference voltage. The low
drift performance of the REF35250-Q1 complements the low offset voltage and
low-drift of the OPA188-Q1 to provide an accurate solution for split-supply
applications. Take care to match the temperature coefficients of R1 and R2.
REF35-Q1 and OPA188-Q1 Create
Positive and Negative Reference Voltages
Typical Application: Negative Reference Voltage
For applications requiring a negative and positive
reference voltage, the REF35-Q1 and OPA188-Q1 can be used to provide a dual-supply
reference from a 5 V supply. shows the REF35250 used to provide a 2.5 V supply reference voltage. The low
drift performance of the REF35250-Q1 complements the low offset voltage and
low-drift of the OPA188-Q1 to provide an accurate solution for split-supply
applications. Take care to match the temperature coefficients of R1 and R2.
REF35-Q1 and OPA188-Q1 Create
Positive and Negative Reference Voltages
For applications requiring a negative and positive
reference voltage, the REF35-Q1 and OPA188-Q1 can be used to provide a dual-supply
reference from a 5 V supply. shows the REF35250 used to provide a 2.5 V supply reference voltage. The low
drift performance of the REF35250-Q1 complements the low offset voltage and
low-drift of the OPA188-Q1 to provide an accurate solution for split-supply
applications. Take care to match the temperature coefficients of R1 and R2.
REF35-Q1 and OPA188-Q1 Create
Positive and Negative Reference Voltages
For applications requiring a negative and positive
reference voltage, the REF35-Q1 and OPA188-Q1 can be used to provide a dual-supply
reference from a 5 V supply. shows the REF35250 used to provide a 2.5 V supply reference voltage. The low
drift performance of the REF35250-Q1 complements the low offset voltage and
low-drift of the OPA188-Q1 to provide an accurate solution for split-supply
applications. Take care to match the temperature coefficients of R1 and R2.
REF35-Q1 and OPA188-Q1 Create
Positive and Negative Reference Voltages
REF35-Q1 and OPA188-Q1 Create
Positive and Negative Reference Voltages
Typical Application: Precision Power Supply and
Reference
shows the basic configuration for the REF35-Q1 device as precision power supply
to ADS7038-Q1 data converter which uses its power supply AVDD as reference.
Connect bypass capacitors according to the guidelines in section.
Basic Reference
Connection
Design Requirements
A detailed design procedure is described based on a design example. For this design example, use the parameters listed in #GUID-DAF2896F-5326-4B26-9E60-EB6B4E8627BF/SBAS8049082 as the input parameters.
Design Example Parameters
DESIGN PARAMETER
VALUE
Input voltage range VIN
0 V - 5 V
Output resolution
12-bit
REF input capacitor
1 µF
REF output capacitor
10 µF
Detailed Design Procedure
Selection of Reference
The REF35500-Q1 reference is selected for this
design. The REF35500-Q1 device operates of very low quiescent current while offering
±0.05 % initial accuracy and very low noise. These parameters help improve system
accuracy as compared to external LDO based power supply. The 5 V reference voltage
supports the 0 V to 5 V input range specification.
Input and Output Capacitors
A 1 μF to 10 μF electrolytic or ceramic capacitor
can be connected to the input to improve transient response in
applications where the supply voltage may fluctuate.
A ceramic capacitor of at least a 0.1 μF must be
connected to the output to improve stability and help filter out
high frequency noise. Add an additional 10 μF capacitor in parallel
to improve transient performance in response to sudden changes in
load current; however, keep in mind that doing so increases the
start-up time of the device.
Best performance and stability is attained with
low-ESR, low-inductance ceramic chip-type output capacitors (X5R,
X7R, or similar). If using an electrolytic capacitor on the output,
place a 0.1 μF ceramic capacitor in parallel to reduce overall ESR
on the output. Place the input and output capacitors as close as
possible to the device.
Selection of ADC
ADS7038-Q1
12-bit 8 channel multiplexed ADC is chosen for
this application. The ADC offers low current
operation with averaging mode to increase the
resolution to 16-bit with internal averaging modes
while operating with slow sampling speed.
Application Curves
#GUID-CF45450E-B081-4939-875B-88E00F6CF550/TABLE_NRR_FLW_3RB shows the captured measurement results for various DC inputs. The ADC output is
captured and analyzed for output accuracy, code spread and sigma with REF35500-Q1 as
power supply vs LDO as power supply.
REF35-Q1 offers better accuracy and lower noise
than the LDO device at lower quiescent current. This results in lower error in
measurement as well as lower ADC output code variation across various OSR
seetings.
DC Input Performance Test
Results
INPUT V
ADC OSR SETTING
REF35500
LDO
ERROR
CODE SPREAD
ERROR
CODE SPREAD
1.0 V
0
0.01 mV
32 LSB
8.9 mV
48 LSB
8
0.3 mV
10 LSB
9.21 mV
16 LSB
128
0.38 mV
6 LSB
9.26 mV
6 LSB
2.5 V
0
0.69 mV
32 LSB
22.89 mV
64 LSB
8
1.44 mV
10 LSB
23.63 mV
18 LSB
128
1.17 mV
3 LSB
23.41 mV
5 LSB
4 V
0
2.27 mV
32 LSB
37.84 mV
48 LSB
8
3.01 mV
24 LSB
38.62 mV
24 LSB
128
2.46 mV
3 LSB
38.09 mV
17 LSB
Typical Application: Precision Power Supply and
Reference
shows the basic configuration for the REF35-Q1 device as precision power supply
to ADS7038-Q1 data converter which uses its power supply AVDD as reference.
Connect bypass capacitors according to the guidelines in section.
Basic Reference
Connection
shows the basic configuration for the REF35-Q1 device as precision power supply
to ADS7038-Q1 data converter which uses its power supply AVDD as reference.
Connect bypass capacitors according to the guidelines in section.
Basic Reference
Connection
shows the basic configuration for the REF35-Q1 device as precision power supply
to ADS7038-Q1 data converter which uses its power supply AVDD as reference.
Connect bypass capacitors according to the guidelines in section.ADS7038-Q1
Basic Reference
Connection
Basic Reference
Connection
Design Requirements
A detailed design procedure is described based on a design example. For this design example, use the parameters listed in #GUID-DAF2896F-5326-4B26-9E60-EB6B4E8627BF/SBAS8049082 as the input parameters.
Design Example Parameters
DESIGN PARAMETER
VALUE
Input voltage range VIN
0 V - 5 V
Output resolution
12-bit
REF input capacitor
1 µF
REF output capacitor
10 µF
Design Requirements
A detailed design procedure is described based on a design example. For this design example, use the parameters listed in #GUID-DAF2896F-5326-4B26-9E60-EB6B4E8627BF/SBAS8049082 as the input parameters.
Design Example Parameters
DESIGN PARAMETER
VALUE
Input voltage range VIN
0 V - 5 V
Output resolution
12-bit
REF input capacitor
1 µF
REF output capacitor
10 µF
A detailed design procedure is described based on a design example. For this design example, use the parameters listed in #GUID-DAF2896F-5326-4B26-9E60-EB6B4E8627BF/SBAS8049082 as the input parameters.
Design Example Parameters
DESIGN PARAMETER
VALUE
Input voltage range VIN
0 V - 5 V
Output resolution
12-bit
REF input capacitor
1 µF
REF output capacitor
10 µF
A detailed design procedure is described based on a design example. For this design example, use the parameters listed in #GUID-DAF2896F-5326-4B26-9E60-EB6B4E8627BF/SBAS8049082 as the input parameters.#GUID-DAF2896F-5326-4B26-9E60-EB6B4E8627BF/SBAS8049082
Design Example Parameters
DESIGN PARAMETER
VALUE
Input voltage range VIN
0 V - 5 V
Output resolution
12-bit
REF input capacitor
1 µF
REF output capacitor
10 µF
Design Example Parameters
DESIGN PARAMETER
VALUE
Input voltage range VIN
0 V - 5 V
Output resolution
12-bit
REF input capacitor
1 µF
REF output capacitor
10 µF
DESIGN PARAMETER
VALUE
DESIGN PARAMETER
VALUE
DESIGN PARAMETERVALUE
Input voltage range VIN
0 V - 5 V
Output resolution
12-bit
REF input capacitor
1 µF
REF output capacitor
10 µF
Input voltage range VIN
0 V - 5 V
Input voltage range VIN
IN0 V - 5 V
Output resolution
12-bit
Output resolution12-bit
REF input capacitor
1 µF
REF input capacitor1 µF
REF output capacitor
10 µF
REF output capacitor10 µF
Detailed Design Procedure
Selection of Reference
The REF35500-Q1 reference is selected for this
design. The REF35500-Q1 device operates of very low quiescent current while offering
±0.05 % initial accuracy and very low noise. These parameters help improve system
accuracy as compared to external LDO based power supply. The 5 V reference voltage
supports the 0 V to 5 V input range specification.
Input and Output Capacitors
A 1 μF to 10 μF electrolytic or ceramic capacitor
can be connected to the input to improve transient response in
applications where the supply voltage may fluctuate.
A ceramic capacitor of at least a 0.1 μF must be
connected to the output to improve stability and help filter out
high frequency noise. Add an additional 10 μF capacitor in parallel
to improve transient performance in response to sudden changes in
load current; however, keep in mind that doing so increases the
start-up time of the device.
Best performance and stability is attained with
low-ESR, low-inductance ceramic chip-type output capacitors (X5R,
X7R, or similar). If using an electrolytic capacitor on the output,
place a 0.1 μF ceramic capacitor in parallel to reduce overall ESR
on the output. Place the input and output capacitors as close as
possible to the device.
Selection of ADC
ADS7038-Q1
12-bit 8 channel multiplexed ADC is chosen for
this application. The ADC offers low current
operation with averaging mode to increase the
resolution to 16-bit with internal averaging modes
while operating with slow sampling speed.
Detailed Design Procedure
Selection of Reference
The REF35500-Q1 reference is selected for this
design. The REF35500-Q1 device operates of very low quiescent current while offering
±0.05 % initial accuracy and very low noise. These parameters help improve system
accuracy as compared to external LDO based power supply. The 5 V reference voltage
supports the 0 V to 5 V input range specification.
Selection of Reference
The REF35500-Q1 reference is selected for this
design. The REF35500-Q1 device operates of very low quiescent current while offering
±0.05 % initial accuracy and very low noise. These parameters help improve system
accuracy as compared to external LDO based power supply. The 5 V reference voltage
supports the 0 V to 5 V input range specification.
The REF35500-Q1 reference is selected for this
design. The REF35500-Q1 device operates of very low quiescent current while offering
±0.05 % initial accuracy and very low noise. These parameters help improve system
accuracy as compared to external LDO based power supply. The 5 V reference voltage
supports the 0 V to 5 V input range specification.
The REF35500-Q1 reference is selected for this
design. The REF35500-Q1 device operates of very low quiescent current while offering
±0.05 % initial accuracy and very low noise. These parameters help improve system
accuracy as compared to external LDO based power supply. The 5 V reference voltage
supports the 0 V to 5 V input range specification.
Input and Output Capacitors
A 1 μF to 10 μF electrolytic or ceramic capacitor
can be connected to the input to improve transient response in
applications where the supply voltage may fluctuate.
A ceramic capacitor of at least a 0.1 μF must be
connected to the output to improve stability and help filter out
high frequency noise. Add an additional 10 μF capacitor in parallel
to improve transient performance in response to sudden changes in
load current; however, keep in mind that doing so increases the
start-up time of the device.
Best performance and stability is attained with
low-ESR, low-inductance ceramic chip-type output capacitors (X5R,
X7R, or similar). If using an electrolytic capacitor on the output,
place a 0.1 μF ceramic capacitor in parallel to reduce overall ESR
on the output. Place the input and output capacitors as close as
possible to the device.
Input and Output Capacitors
A 1 μF to 10 μF electrolytic or ceramic capacitor
can be connected to the input to improve transient response in
applications where the supply voltage may fluctuate.
A ceramic capacitor of at least a 0.1 μF must be
connected to the output to improve stability and help filter out
high frequency noise. Add an additional 10 μF capacitor in parallel
to improve transient performance in response to sudden changes in
load current; however, keep in mind that doing so increases the
start-up time of the device.
Best performance and stability is attained with
low-ESR, low-inductance ceramic chip-type output capacitors (X5R,
X7R, or similar). If using an electrolytic capacitor on the output,
place a 0.1 μF ceramic capacitor in parallel to reduce overall ESR
on the output. Place the input and output capacitors as close as
possible to the device.
A 1 μF to 10 μF electrolytic or ceramic capacitor
can be connected to the input to improve transient response in
applications where the supply voltage may fluctuate.
A ceramic capacitor of at least a 0.1 μF must be
connected to the output to improve stability and help filter out
high frequency noise. Add an additional 10 μF capacitor in parallel
to improve transient performance in response to sudden changes in
load current; however, keep in mind that doing so increases the
start-up time of the device.
Best performance and stability is attained with
low-ESR, low-inductance ceramic chip-type output capacitors (X5R,
X7R, or similar). If using an electrolytic capacitor on the output,
place a 0.1 μF ceramic capacitor in parallel to reduce overall ESR
on the output. Place the input and output capacitors as close as
possible to the device.
A 1 μF to 10 μF electrolytic or ceramic capacitor
can be connected to the input to improve transient response in
applications where the supply voltage may fluctuate. A ceramic capacitor of at least a 0.1 μF must be
connected to the output to improve stability and help filter out
high frequency noise. Add an additional 10 μF capacitor in parallel
to improve transient performance in response to sudden changes in
load current; however, keep in mind that doing so increases the
start-up time of the device.Best performance and stability is attained with
low-ESR, low-inductance ceramic chip-type output capacitors (X5R,
X7R, or similar). If using an electrolytic capacitor on the output,
place a 0.1 μF ceramic capacitor in parallel to reduce overall ESR
on the output. Place the input and output capacitors as close as
possible to the device.
Selection of ADC
ADS7038-Q1
12-bit 8 channel multiplexed ADC is chosen for
this application. The ADC offers low current
operation with averaging mode to increase the
resolution to 16-bit with internal averaging modes
while operating with slow sampling speed.
Selection of ADC
ADS7038-Q1
12-bit 8 channel multiplexed ADC is chosen for
this application. The ADC offers low current
operation with averaging mode to increase the
resolution to 16-bit with internal averaging modes
while operating with slow sampling speed.
ADS7038-Q1
12-bit 8 channel multiplexed ADC is chosen for
this application. The ADC offers low current
operation with averaging mode to increase the
resolution to 16-bit with internal averaging modes
while operating with slow sampling speed.
ADS7038-Q1
12-bit 8 channel multiplexed ADC is chosen for
this application. The ADC offers low current
operation with averaging mode to increase the
resolution to 16-bit with internal averaging modes
while operating with slow sampling speed.ADS7038-Q1
Application Curves
#GUID-CF45450E-B081-4939-875B-88E00F6CF550/TABLE_NRR_FLW_3RB shows the captured measurement results for various DC inputs. The ADC output is
captured and analyzed for output accuracy, code spread and sigma with REF35500-Q1 as
power supply vs LDO as power supply.
REF35-Q1 offers better accuracy and lower noise
than the LDO device at lower quiescent current. This results in lower error in
measurement as well as lower ADC output code variation across various OSR
seetings.
DC Input Performance Test
Results
INPUT V
ADC OSR SETTING
REF35500
LDO
ERROR
CODE SPREAD
ERROR
CODE SPREAD
1.0 V
0
0.01 mV
32 LSB
8.9 mV
48 LSB
8
0.3 mV
10 LSB
9.21 mV
16 LSB
128
0.38 mV
6 LSB
9.26 mV
6 LSB
2.5 V
0
0.69 mV
32 LSB
22.89 mV
64 LSB
8
1.44 mV
10 LSB
23.63 mV
18 LSB
128
1.17 mV
3 LSB
23.41 mV
5 LSB
4 V
0
2.27 mV
32 LSB
37.84 mV
48 LSB
8
3.01 mV
24 LSB
38.62 mV
24 LSB
128
2.46 mV
3 LSB
38.09 mV
17 LSB
Application Curves
#GUID-CF45450E-B081-4939-875B-88E00F6CF550/TABLE_NRR_FLW_3RB shows the captured measurement results for various DC inputs. The ADC output is
captured and analyzed for output accuracy, code spread and sigma with REF35500-Q1 as
power supply vs LDO as power supply.
REF35-Q1 offers better accuracy and lower noise
than the LDO device at lower quiescent current. This results in lower error in
measurement as well as lower ADC output code variation across various OSR
seetings.
DC Input Performance Test
Results
INPUT V
ADC OSR SETTING
REF35500
LDO
ERROR
CODE SPREAD
ERROR
CODE SPREAD
1.0 V
0
0.01 mV
32 LSB
8.9 mV
48 LSB
8
0.3 mV
10 LSB
9.21 mV
16 LSB
128
0.38 mV
6 LSB
9.26 mV
6 LSB
2.5 V
0
0.69 mV
32 LSB
22.89 mV
64 LSB
8
1.44 mV
10 LSB
23.63 mV
18 LSB
128
1.17 mV
3 LSB
23.41 mV
5 LSB
4 V
0
2.27 mV
32 LSB
37.84 mV
48 LSB
8
3.01 mV
24 LSB
38.62 mV
24 LSB
128
2.46 mV
3 LSB
38.09 mV
17 LSB
#GUID-CF45450E-B081-4939-875B-88E00F6CF550/TABLE_NRR_FLW_3RB shows the captured measurement results for various DC inputs. The ADC output is
captured and analyzed for output accuracy, code spread and sigma with REF35500-Q1 as
power supply vs LDO as power supply.
REF35-Q1 offers better accuracy and lower noise
than the LDO device at lower quiescent current. This results in lower error in
measurement as well as lower ADC output code variation across various OSR
seetings.
DC Input Performance Test
Results
INPUT V
ADC OSR SETTING
REF35500
LDO
ERROR
CODE SPREAD
ERROR
CODE SPREAD
1.0 V
0
0.01 mV
32 LSB
8.9 mV
48 LSB
8
0.3 mV
10 LSB
9.21 mV
16 LSB
128
0.38 mV
6 LSB
9.26 mV
6 LSB
2.5 V
0
0.69 mV
32 LSB
22.89 mV
64 LSB
8
1.44 mV
10 LSB
23.63 mV
18 LSB
128
1.17 mV
3 LSB
23.41 mV
5 LSB
4 V
0
2.27 mV
32 LSB
37.84 mV
48 LSB
8
3.01 mV
24 LSB
38.62 mV
24 LSB
128
2.46 mV
3 LSB
38.09 mV
17 LSB
#GUID-CF45450E-B081-4939-875B-88E00F6CF550/TABLE_NRR_FLW_3RB shows the captured measurement results for various DC inputs. The ADC output is
captured and analyzed for output accuracy, code spread and sigma with REF35500-Q1 as
power supply vs LDO as power supply.#GUID-CF45450E-B081-4939-875B-88E00F6CF550/TABLE_NRR_FLW_3RBREF35-Q1 offers better accuracy and lower noise
than the LDO device at lower quiescent current. This results in lower error in
measurement as well as lower ADC output code variation across various OSR
seetings.
DC Input Performance Test
Results
INPUT V
ADC OSR SETTING
REF35500
LDO
ERROR
CODE SPREAD
ERROR
CODE SPREAD
1.0 V
0
0.01 mV
32 LSB
8.9 mV
48 LSB
8
0.3 mV
10 LSB
9.21 mV
16 LSB
128
0.38 mV
6 LSB
9.26 mV
6 LSB
2.5 V
0
0.69 mV
32 LSB
22.89 mV
64 LSB
8
1.44 mV
10 LSB
23.63 mV
18 LSB
128
1.17 mV
3 LSB
23.41 mV
5 LSB
4 V
0
2.27 mV
32 LSB
37.84 mV
48 LSB
8
3.01 mV
24 LSB
38.62 mV
24 LSB
128
2.46 mV
3 LSB
38.09 mV
17 LSB
DC Input Performance Test
Results
INPUT V
ADC OSR SETTING
REF35500
LDO
ERROR
CODE SPREAD
ERROR
CODE SPREAD
1.0 V
0
0.01 mV
32 LSB
8.9 mV
48 LSB
8
0.3 mV
10 LSB
9.21 mV
16 LSB
128
0.38 mV
6 LSB
9.26 mV
6 LSB
2.5 V
0
0.69 mV
32 LSB
22.89 mV
64 LSB
8
1.44 mV
10 LSB
23.63 mV
18 LSB
128
1.17 mV
3 LSB
23.41 mV
5 LSB
4 V
0
2.27 mV
32 LSB
37.84 mV
48 LSB
8
3.01 mV
24 LSB
38.62 mV
24 LSB
128
2.46 mV
3 LSB
38.09 mV
17 LSB
INPUT V
ADC OSR SETTING
REF35500
LDO
ERROR
CODE SPREAD
ERROR
CODE SPREAD
INPUT V
ADC OSR SETTING
REF35500
LDO
INPUT VADC OSR SETTINGREF35500LDO
ERROR
CODE SPREAD
ERROR
CODE SPREAD
ERRORCODE SPREADERRORCODE SPREAD
1.0 V
0
0.01 mV
32 LSB
8.9 mV
48 LSB
8
0.3 mV
10 LSB
9.21 mV
16 LSB
128
0.38 mV
6 LSB
9.26 mV
6 LSB
2.5 V
0
0.69 mV
32 LSB
22.89 mV
64 LSB
8
1.44 mV
10 LSB
23.63 mV
18 LSB
128
1.17 mV
3 LSB
23.41 mV
5 LSB
4 V
0
2.27 mV
32 LSB
37.84 mV
48 LSB
8
3.01 mV
24 LSB
38.62 mV
24 LSB
128
2.46 mV
3 LSB
38.09 mV
17 LSB
1.0 V
0
0.01 mV
32 LSB
8.9 mV
48 LSB
1.0 V00.01 mV32 LSB8.9 mV48 LSB
8
0.3 mV
10 LSB
9.21 mV
16 LSB
80.3 mV10 LSB9.21 mV16 LSB
128
0.38 mV
6 LSB
9.26 mV
6 LSB
1280.38 mV6 LSB9.26 mV6 LSB
2.5 V
0
0.69 mV
32 LSB
22.89 mV
64 LSB
2.5 V00.69 mV32 LSB22.89 mV64 LSB
8
1.44 mV
10 LSB
23.63 mV
18 LSB
81.44 mV10 LSB23.63 mV18 LSB
128
1.17 mV
3 LSB
23.41 mV
5 LSB
1281.17 mV3 LSB23.41 mV5 LSB
4 V
0
2.27 mV
32 LSB
37.84 mV
48 LSB
4 V02.27 mV32 LSB37.84 mV48 LSB
8
3.01 mV
24 LSB
38.62 mV
24 LSB
83.01 mV24 LSB38.62 mV24 LSB
128
2.46 mV
3 LSB
38.09 mV
17 LSB
1282.46 mV3 LSB38.09 mV17 LSB
Power Supply Recommendations
The REF35 family of references
feature an extremely low-dropout voltage. These references can be operated with
a supply of only 50 mV above the output voltage at no load. TI recommends a
supply bypass capacitor ranging between 0.1 µF to 10 µF.
Power Supply Recommendations
The REF35 family of references
feature an extremely low-dropout voltage. These references can be operated with
a supply of only 50 mV above the output voltage at no load. TI recommends a
supply bypass capacitor ranging between 0.1 µF to 10 µF.
The REF35 family of references
feature an extremely low-dropout voltage. These references can be operated with
a supply of only 50 mV above the output voltage at no load. TI recommends a
supply bypass capacitor ranging between 0.1 µF to 10 µF.
The REF35 family of references
feature an extremely low-dropout voltage. These references can be operated with
a supply of only 50 mV above the output voltage at no load. TI recommends a
supply bypass capacitor ranging between 0.1 µF to 10 µF.
The REF35 family of references
feature an extremely low-dropout voltage. These references can be operated with
a supply of only 50 mV above the output voltage at no load. TI recommends a
supply bypass capacitor ranging between 0.1 µF to 10 µF.
Layout
Layout Guidelines
shows an example of a PCB layout for a data acquisition system using the REF35-Q1. Some
key considerations are:
Connect low-ESR, 0.1 μF ceramic bypass
capacitors at VIN, VREF of the REF35-Q1.
Decouple other active devices in the
system per the device specifications.
Using a solid ground plane helps
distribute heat and reduces electromagnetic interference (EMI) noise pickup.
Place the external components as close
to the device as possible.
Do not run sensitive analog traces in
parallel with digital traces. Avoid crossing digital and analog traces if possible, and
only make perpendicular crossings when absolutely necessary.
shows the pin compatibility with TI REF31xx series reference in the 3-pin SOT-23 package
when using the REF35xxx family footprint. You must rotate the REF31xx reference device by
180º before assembly.
Layout Examples
Layout Example
Pin Compatibility With
REF31xx
Layout
Layout Guidelines
shows an example of a PCB layout for a data acquisition system using the REF35-Q1. Some
key considerations are:
Connect low-ESR, 0.1 μF ceramic bypass
capacitors at VIN, VREF of the REF35-Q1.
Decouple other active devices in the
system per the device specifications.
Using a solid ground plane helps
distribute heat and reduces electromagnetic interference (EMI) noise pickup.
Place the external components as close
to the device as possible.
Do not run sensitive analog traces in
parallel with digital traces. Avoid crossing digital and analog traces if possible, and
only make perpendicular crossings when absolutely necessary.
shows the pin compatibility with TI REF31xx series reference in the 3-pin SOT-23 package
when using the REF35xxx family footprint. You must rotate the REF31xx reference device by
180º before assembly.
Layout Guidelines
shows an example of a PCB layout for a data acquisition system using the REF35-Q1. Some
key considerations are:
Connect low-ESR, 0.1 μF ceramic bypass
capacitors at VIN, VREF of the REF35-Q1.
Decouple other active devices in the
system per the device specifications.
Using a solid ground plane helps
distribute heat and reduces electromagnetic interference (EMI) noise pickup.
Place the external components as close
to the device as possible.
Do not run sensitive analog traces in
parallel with digital traces. Avoid crossing digital and analog traces if possible, and
only make perpendicular crossings when absolutely necessary.
shows the pin compatibility with TI REF31xx series reference in the 3-pin SOT-23 package
when using the REF35xxx family footprint. You must rotate the REF31xx reference device by
180º before assembly.
shows an example of a PCB layout for a data acquisition system using the REF35-Q1. Some
key considerations are:
Connect low-ESR, 0.1 μF ceramic bypass
capacitors at VIN, VREF of the REF35-Q1.
Decouple other active devices in the
system per the device specifications.
Using a solid ground plane helps
distribute heat and reduces electromagnetic interference (EMI) noise pickup.
Place the external components as close
to the device as possible.
Do not run sensitive analog traces in
parallel with digital traces. Avoid crossing digital and analog traces if possible, and
only make perpendicular crossings when absolutely necessary.
shows the pin compatibility with TI REF31xx series reference in the 3-pin SOT-23 package
when using the REF35xxx family footprint. You must rotate the REF31xx reference device by
180º before assembly.
shows an example of a PCB layout for a data acquisition system using the REF35-Q1. Some
key considerations are:
Connect low-ESR, 0.1 μF ceramic bypass
capacitors at VIN, VREF of the REF35-Q1.
Decouple other active devices in the
system per the device specifications.
Using a solid ground plane helps
distribute heat and reduces electromagnetic interference (EMI) noise pickup.
Place the external components as close
to the device as possible.
Do not run sensitive analog traces in
parallel with digital traces. Avoid crossing digital and analog traces if possible, and
only make perpendicular crossings when absolutely necessary.
Connect low-ESR, 0.1 μF ceramic bypass
capacitors at VIN, VREF of the REF35-Q1.
Decouple other active devices in the
system per the device specifications.
Using a solid ground plane helps
distribute heat and reduces electromagnetic interference (EMI) noise pickup.
Place the external components as close
to the device as possible.
Do not run sensitive analog traces in
parallel with digital traces. Avoid crossing digital and analog traces if possible, and
only make perpendicular crossings when absolutely necessary.
Connect low-ESR, 0.1 μF ceramic bypass
capacitors at VIN, VREF of the REF35-Q1.INREFDecouple other active devices in the
system per the device specifications.Using a solid ground plane helps
distribute heat and reduces electromagnetic interference (EMI) noise pickup.Place the external components as close
to the device as possible. Do not run sensitive analog traces in
parallel with digital traces. Avoid crossing digital and analog traces if possible, and
only make perpendicular crossings when absolutely necessary.
shows the pin compatibility with TI REF31xx series reference in the 3-pin SOT-23 package
when using the REF35xxx family footprint. You must rotate the REF31xx reference device by
180º before assembly.
Layout Examples
Layout Example
Pin Compatibility With
REF31xx
Layout Examples
Layout Example
Pin Compatibility With
REF31xx
Layout Example
Pin Compatibility With
REF31xx
Layout Example
Pin Compatibility With
REF31xx
Layout Example
Layout Example
Pin Compatibility With
REF31xx
Pin Compatibility With
REF31xx
Device and Documentation Support
Documentation Support
Related Documentation
For related documentation see the following:
INA21x Voltage Output, Low- or High-Side Measurement, Bidirectional, Zero-Drift Series, Current-Shunt Monitors
Low-Drift Bidirectional Single-Supply Low-Side Current Sensing Reference Design
接收文档更新通知
要接收文档更新通知，请导航至 ti.com 上的器件产品文件夹。点击订阅更新 进行注册，即可每周接收产品信息更改摘要。有关更改的详细信息，请查看任何已修订文档中包含的修订历史记录。
支持资源
TI E2E 支持论坛是工程师的重要参考资料，可直接从专家获得快速、经过验证的解答和设计帮助。搜索现有解答或提出自己的问题可获得所需的快速设计帮助。
链接的内容由各个贡献者“按原样”提供。这些内容并不构成 TI 技术规范，并且不一定反映 TI 的观点；请参阅 TI 的《使用条款》。
Trademarks
静电放电警告
静电放电 (ESD) 会损坏这个集成电路。德州仪器 (TI) 建议通过适当的预防措施处理所有集成电路。如果不遵守正确的处理和安装程序，可能会损坏集成电路。
ESD 的损坏小至导致微小的性能降级，大至整个器件故障。精密的集成电路可能更容易受到损坏，这是因为非常细微的参数更改都可能会导致器件与其发布的规格不相符。
术语表
TI 术语表
本术语表列出并解释了术语、首字母缩略词和定义。
Device and Documentation Support
Documentation Support
Related Documentation
For related documentation see the following:
INA21x Voltage Output, Low- or High-Side Measurement, Bidirectional, Zero-Drift Series, Current-Shunt Monitors
Low-Drift Bidirectional Single-Supply Low-Side Current Sensing Reference Design
Documentation Support
Related Documentation
For related documentation see the following:
INA21x Voltage Output, Low- or High-Side Measurement, Bidirectional, Zero-Drift Series, Current-Shunt Monitors
Low-Drift Bidirectional Single-Supply Low-Side Current Sensing Reference Design
Related Documentation
For related documentation see the following:
INA21x Voltage Output, Low- or High-Side Measurement, Bidirectional, Zero-Drift Series, Current-Shunt Monitors
Low-Drift Bidirectional Single-Supply Low-Side Current Sensing Reference Design
For related documentation see the following:
INA21x Voltage Output, Low- or High-Side Measurement, Bidirectional, Zero-Drift Series, Current-Shunt Monitors
Low-Drift Bidirectional Single-Supply Low-Side Current Sensing Reference Design
For related documentation see the following:
INA21x Voltage Output, Low- or High-Side Measurement, Bidirectional, Zero-Drift Series, Current-Shunt Monitors
Low-Drift Bidirectional Single-Supply Low-Side Current Sensing Reference Design
INA21x Voltage Output, Low- or High-Side Measurement, Bidirectional, Zero-Drift Series, Current-Shunt Monitors
INA21x Voltage Output, Low- or High-Side Measurement, Bidirectional, Zero-Drift Series, Current-Shunt Monitors
INA21x Voltage Output, Low- or High-Side Measurement, Bidirectional, Zero-Drift Series, Current-Shunt Monitors
Low-Drift Bidirectional Single-Supply Low-Side Current Sensing Reference Design
Low-Drift Bidirectional Single-Supply Low-Side Current Sensing Reference Design
Low-Drift Bidirectional Single-Supply Low-Side Current Sensing Reference Design
接收文档更新通知
要接收文档更新通知，请导航至 ti.com 上的器件产品文件夹。点击订阅更新 进行注册，即可每周接收产品信息更改摘要。有关更改的详细信息，请查看任何已修订文档中包含的修订历史记录。
接收文档更新通知
要接收文档更新通知，请导航至 ti.com 上的器件产品文件夹。点击订阅更新 进行注册，即可每周接收产品信息更改摘要。有关更改的详细信息，请查看任何已修订文档中包含的修订历史记录。
要接收文档更新通知，请导航至 ti.com 上的器件产品文件夹。点击订阅更新 进行注册，即可每周接收产品信息更改摘要。有关更改的详细信息，请查看任何已修订文档中包含的修订历史记录。
要接收文档更新通知，请导航至 ti.com 上的器件产品文件夹。点击订阅更新 进行注册，即可每周接收产品信息更改摘要。有关更改的详细信息，请查看任何已修订文档中包含的修订历史记录。ti.com订阅更新
支持资源
TI E2E 支持论坛是工程师的重要参考资料，可直接从专家获得快速、经过验证的解答和设计帮助。搜索现有解答或提出自己的问题可获得所需的快速设计帮助。
链接的内容由各个贡献者“按原样”提供。这些内容并不构成 TI 技术规范，并且不一定反映 TI 的观点；请参阅 TI 的《使用条款》。
支持资源
TI E2E 支持论坛是工程师的重要参考资料，可直接从专家获得快速、经过验证的解答和设计帮助。搜索现有解答或提出自己的问题可获得所需的快速设计帮助。
链接的内容由各个贡献者“按原样”提供。这些内容并不构成 TI 技术规范，并且不一定反映 TI 的观点；请参阅 TI 的《使用条款》。
TI E2E 支持论坛是工程师的重要参考资料，可直接从专家获得快速、经过验证的解答和设计帮助。搜索现有解答或提出自己的问题可获得所需的快速设计帮助。
TI E2E 支持论坛TI E2E链接的内容由各个贡献者“按原样”提供。这些内容并不构成 TI 技术规范，并且不一定反映 TI 的观点；请参阅 TI 的《使用条款》。《使用条款》
Trademarks
Trademarks
静电放电警告
静电放电 (ESD) 会损坏这个集成电路。德州仪器 (TI) 建议通过适当的预防措施处理所有集成电路。如果不遵守正确的处理和安装程序，可能会损坏集成电路。
ESD 的损坏小至导致微小的性能降级，大至整个器件故障。精密的集成电路可能更容易受到损坏，这是因为非常细微的参数更改都可能会导致器件与其发布的规格不相符。
静电放电警告
静电放电 (ESD) 会损坏这个集成电路。德州仪器 (TI) 建议通过适当的预防措施处理所有集成电路。如果不遵守正确的处理和安装程序，可能会损坏集成电路。
ESD 的损坏小至导致微小的性能降级，大至整个器件故障。精密的集成电路可能更容易受到损坏，这是因为非常细微的参数更改都可能会导致器件与其发布的规格不相符。
静电放电 (ESD) 会损坏这个集成电路。德州仪器 (TI) 建议通过适当的预防措施处理所有集成电路。如果不遵守正确的处理和安装程序，可能会损坏集成电路。
ESD 的损坏小至导致微小的性能降级，大至整个器件故障。精密的集成电路可能更容易受到损坏，这是因为非常细微的参数更改都可能会导致器件与其发布的规格不相符。
静电放电 (ESD) 会损坏这个集成电路。德州仪器 (TI) 建议通过适当的预防措施处理所有集成电路。如果不遵守正确的处理和安装程序，可能会损坏集成电路。
ESD 的损坏小至导致微小的性能降级，大至整个器件故障。精密的集成电路可能更容易受到损坏，这是因为非常细微的参数更改都可能会导致器件与其发布的规格不相符。
静电放电 (ESD) 会损坏这个集成电路。德州仪器 (TI) 建议通过适当的预防措施处理所有集成电路。如果不遵守正确的处理和安装程序，可能会损坏集成电路。
ESD 的损坏小至导致微小的性能降级，大至整个器件故障。精密的集成电路可能更容易受到损坏，这是因为非常细微的参数更改都可能会导致器件与其发布的规格不相符。
静电放电 (ESD) 会损坏这个集成电路。德州仪器 (TI) 建议通过适当的预防措施处理所有集成电路。如果不遵守正确的处理和安装程序，可能会损坏集成电路。
静电放电 (ESD) 会损坏这个集成电路。德州仪器 (TI) 建议通过适当的预防措施处理所有集成电路。如果不遵守正确的处理和安装程序，可能会损坏集成电路。
ESD 的损坏小至导致微小的性能降级，大至整个器件故障。精密的集成电路可能更容易受到损坏，这是因为非常细微的参数更改都可能会导致器件与其发布的规格不相符。
ESD 的损坏小至导致微小的性能降级，大至整个器件故障。精密的集成电路可能更容易受到损坏，这是因为非常细微的参数更改都可能会导致器件与其发布的规格不相符。
术语表
TI 术语表
本术语表列出并解释了术语、首字母缩略词和定义。
术语表
TI 术语表
本术语表列出并解释了术语、首字母缩略词和定义。
TI 术语表
本术语表列出并解释了术语、首字母缩略词和定义。
TI 术语表
本术语表列出并解释了术语、首字母缩略词和定义。
TI 术语表
TI 术语表本术语表列出并解释了术语、首字母缩略词和定义。
Mechanical, Packaging, and Orderable Information
The following pages include
mechanical packaging and orderable information. This information is the most
current data available for the designated devices. This data is subject to
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The following pages include
mechanical packaging and orderable information. This information is the most
current data available for the designated devices. This data is subject to
change without notice and revision of this document. For browser-based versions
of this data sheet, refer to the left-hand navigation.
The following pages include
mechanical packaging and orderable information. This information is the most
current data available for the designated devices. This data is subject to
change without notice and revision of this document. For browser-based versions
of this data sheet, refer to the left-hand navigation.
重要声明和免责声明
TI“按原样”提供技术和可靠性数据（包括数据表）、设计资源（包括参考设计）、应用或其他设计建议、网络工具、安全信息和其他资源，不保证没有瑕疵且不做出任何明示或暗示的担保，包括但不限于对适销性、某特定用途方面的适用性或不侵犯任何第三方知识产权的暗示担保。
这些资源可供使用 TI 产品进行设计的熟练开发人员使用。您将自行承担以下全部责任：(1) 针对您的应用选择合适的
TI 产品，(2) 设计、验证并测试您的应用，(3) 确保您的应用满足相应标准以及任何其他功能安全、信息安全、监管或其他要求。
这些资源如有变更，恕不另行通知。TI 授权您仅可将这些资源用于研发本资源所述的 TI
产品的应用。严禁对这些资源进行其他复制或展示。您无权使用任何其他 TI 知识产权或任何第三方知识产权。您应全额赔偿因在这些资源的使用中对 TI
及其代表造成的任何索赔、损害、成本、损失和债务，TI 对此概不负责。
TI 提供的产品受 TI 的销售条款或 ti.com 上其他适用条款/TI
产品随附的其他适用条款的约束。TI 提供这些资源并不会扩展或以其他方式更改 TI 针对 TI
产品发布的适用的担保或担保免责声明。
TI 反对并拒绝您可能提出的任何其他或不同的条款。IMPORTANT NOTICE
邮寄地址：Texas
Instruments, Post Office Box 655303, Dallas, Texas 75265Copyright © 2023，德州仪器
(TI) 公司
重要声明和免责声明
TI“按原样”提供技术和可靠性数据（包括数据表）、设计资源（包括参考设计）、应用或其他设计建议、网络工具、安全信息和其他资源，不保证没有瑕疵且不做出任何明示或暗示的担保，包括但不限于对适销性、某特定用途方面的适用性或不侵犯任何第三方知识产权的暗示担保。
这些资源可供使用 TI 产品进行设计的熟练开发人员使用。您将自行承担以下全部责任：(1) 针对您的应用选择合适的
TI 产品，(2) 设计、验证并测试您的应用，(3) 确保您的应用满足相应标准以及任何其他功能安全、信息安全、监管或其他要求。
这些资源如有变更，恕不另行通知。TI 授权您仅可将这些资源用于研发本资源所述的 TI
产品的应用。严禁对这些资源进行其他复制或展示。您无权使用任何其他 TI 知识产权或任何第三方知识产权。您应全额赔偿因在这些资源的使用中对 TI
及其代表造成的任何索赔、损害、成本、损失和债务，TI 对此概不负责。
TI 提供的产品受 TI 的销售条款或 ti.com 上其他适用条款/TI
产品随附的其他适用条款的约束。TI 提供这些资源并不会扩展或以其他方式更改 TI 针对 TI
产品发布的适用的担保或担保免责声明。
TI 反对并拒绝您可能提出的任何其他或不同的条款。IMPORTANT NOTICE
邮寄地址：Texas
Instruments, Post Office Box 655303, Dallas, Texas 75265Copyright © 2023，德州仪器
(TI) 公司
TI“按原样”提供技术和可靠性数据（包括数据表）、设计资源（包括参考设计）、应用或其他设计建议、网络工具、安全信息和其他资源，不保证没有瑕疵且不做出任何明示或暗示的担保，包括但不限于对适销性、某特定用途方面的适用性或不侵犯任何第三方知识产权的暗示担保。
这些资源可供使用 TI 产品进行设计的熟练开发人员使用。您将自行承担以下全部责任：(1) 针对您的应用选择合适的
TI 产品，(2) 设计、验证并测试您的应用，(3) 确保您的应用满足相应标准以及任何其他功能安全、信息安全、监管或其他要求。
这些资源如有变更，恕不另行通知。TI 授权您仅可将这些资源用于研发本资源所述的 TI
产品的应用。严禁对这些资源进行其他复制或展示。您无权使用任何其他 TI 知识产权或任何第三方知识产权。您应全额赔偿因在这些资源的使用中对 TI
及其代表造成的任何索赔、损害、成本、损失和债务，TI 对此概不负责。
TI 提供的产品受 TI 的销售条款或 ti.com 上其他适用条款/TI
产品随附的其他适用条款的约束。TI 提供这些资源并不会扩展或以其他方式更改 TI 针对 TI
产品发布的适用的担保或担保免责声明。
TI 反对并拒绝您可能提出的任何其他或不同的条款。IMPORTANT NOTICE
TI“按原样”提供技术和可靠性数据（包括数据表）、设计资源（包括参考设计）、应用或其他设计建议、网络工具、安全信息和其他资源，不保证没有瑕疵且不做出任何明示或暗示的担保，包括但不限于对适销性、某特定用途方面的适用性或不侵犯任何第三方知识产权的暗示担保。
这些资源可供使用 TI 产品进行设计的熟练开发人员使用。您将自行承担以下全部责任：(1) 针对您的应用选择合适的
TI 产品，(2) 设计、验证并测试您的应用，(3) 确保您的应用满足相应标准以及任何其他功能安全、信息安全、监管或其他要求。
这些资源如有变更，恕不另行通知。TI 授权您仅可将这些资源用于研发本资源所述的 TI
产品的应用。严禁对这些资源进行其他复制或展示。您无权使用任何其他 TI 知识产权或任何第三方知识产权。您应全额赔偿因在这些资源的使用中对 TI
及其代表造成的任何索赔、损害、成本、损失和债务，TI 对此概不负责。
TI 提供的产品受 TI 的销售条款或 ti.com 上其他适用条款/TI
产品随附的其他适用条款的约束。TI 提供这些资源并不会扩展或以其他方式更改 TI 针对 TI
产品发布的适用的担保或担保免责声明。
TI 反对并拒绝您可能提出的任何其他或不同的条款。IMPORTANT NOTICE
TI“按原样”提供技术和可靠性数据（包括数据表）、设计资源（包括参考设计）、应用或其他设计建议、网络工具、安全信息和其他资源，不保证没有瑕疵且不做出任何明示或暗示的担保，包括但不限于对适销性、某特定用途方面的适用性或不侵犯任何第三方知识产权的暗示担保。
这些资源可供使用 TI 产品进行设计的熟练开发人员使用。您将自行承担以下全部责任：(1) 针对您的应用选择合适的
TI 产品，(2) 设计、验证并测试您的应用，(3) 确保您的应用满足相应标准以及任何其他功能安全、信息安全、监管或其他要求。
这些资源如有变更，恕不另行通知。TI 授权您仅可将这些资源用于研发本资源所述的 TI
产品的应用。严禁对这些资源进行其他复制或展示。您无权使用任何其他 TI 知识产权或任何第三方知识产权。您应全额赔偿因在这些资源的使用中对 TI
及其代表造成的任何索赔、损害、成本、损失和债务，TI 对此概不负责。
TI 提供的产品受 TI 的销售条款或 ti.com 上其他适用条款/TI
产品随附的其他适用条款的约束。TI 提供这些资源并不会扩展或以其他方式更改 TI 针对 TI
产品发布的适用的担保或担保免责声明。
TI 反对并拒绝您可能提出的任何其他或不同的条款。IMPORTANT NOTICE
TI“按原样”提供技术和可靠性数据（包括数据表）、设计资源（包括参考设计）、应用或其他设计建议、网络工具、安全信息和其他资源，不保证没有瑕疵且不做出任何明示或暗示的担保，包括但不限于对适销性、某特定用途方面的适用性或不侵犯任何第三方知识产权的暗示担保。
TI“按原样”提供技术和可靠性数据（包括数据表）、设计资源（包括参考设计）、应用或其他设计建议、网络工具、安全信息和其他资源，不保证没有瑕疵且不做出任何明示或暗示的担保，包括但不限于对适销性、某特定用途方面的适用性或不侵犯任何第三方知识产权的暗示担保。
这些资源可供使用 TI 产品进行设计的熟练开发人员使用。您将自行承担以下全部责任：(1) 针对您的应用选择合适的
TI 产品，(2) 设计、验证并测试您的应用，(3) 确保您的应用满足相应标准以及任何其他功能安全、信息安全、监管或其他要求。
这些资源可供使用 TI 产品进行设计的熟练开发人员使用。您将自行承担以下全部责任：(1) 针对您的应用选择合适的
TI 产品，(2) 设计、验证并测试您的应用，(3) 确保您的应用满足相应标准以及任何其他功能安全、信息安全、监管或其他要求。
这些资源如有变更，恕不另行通知。TI 授权您仅可将这些资源用于研发本资源所述的 TI
产品的应用。严禁对这些资源进行其他复制或展示。您无权使用任何其他 TI 知识产权或任何第三方知识产权。您应全额赔偿因在这些资源的使用中对 TI
及其代表造成的任何索赔、损害、成本、损失和债务，TI 对此概不负责。
这些资源如有变更，恕不另行通知。TI 授权您仅可将这些资源用于研发本资源所述的 TI
产品的应用。严禁对这些资源进行其他复制或展示。您无权使用任何其他 TI 知识产权或任何第三方知识产权。您应全额赔偿因在这些资源的使用中对 TI
及其代表造成的任何索赔、损害、成本、损失和债务，TI 对此概不负责。
TI 提供的产品受 TI 的销售条款或 ti.com 上其他适用条款/TI
产品随附的其他适用条款的约束。TI 提供这些资源并不会扩展或以其他方式更改 TI 针对 TI
产品发布的适用的担保或担保免责声明。
TI 提供的产品受 TI 的销售条款或 ti.com 上其他适用条款/TI
产品随附的其他适用条款的约束。TI 提供这些资源并不会扩展或以其他方式更改 TI 针对 TI
产品发布的适用的担保或担保免责声明。TI 的销售条款ti.com
TI 反对并拒绝您可能提出的任何其他或不同的条款。IMPORTANT NOTICE
TI 反对并拒绝您可能提出的任何其他或不同的条款。IMPORTANT NOTICE
IMPORTANT NOTICE
邮寄地址：Texas
Instruments, Post Office Box 655303, Dallas, Texas 75265Copyright © 2023，德州仪器
(TI) 公司
邮寄地址：Texas
Instruments, Post Office Box 655303, Dallas, Texas 75265Copyright © 2023，德州仪器
(TI) 公司
邮寄地址：Texas
Instruments, Post Office Box 655303, Dallas, Texas 75265Copyright © 2023，德州仪器
(TI) 公司
邮寄地址：Texas
Instruments, Post Office Box 655303, Dallas, Texas 75265Copyright © 2023，德州仪器
(TI) 公司
邮寄地址：Texas
Instruments, Post Office Box 655303, Dallas, Texas 75265Copyright © 2023，德州仪器
(TI) 公司
Copyright © 2023，德州仪器
(TI) 公司 section.
Figure 10-2 Basic Reference
Connection